- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄360273 > 5962F9565401VXC 2-Wire, Serial, 8-Bit DACs with Rail-to-Rail Outputs PDF資料下載
參數(shù)資料
| 型號(hào)： | 5962F9565401VXC |
| 英文描述： | 2-Wire, Serial, 8-Bit DACs with Rail-to-Rail Outputs |
| 中文描述： | 四2輸入異或（XOR）門 |
| 文件頁數(shù)： | 32/41頁 |
| 文件大小： | 290K |
| 代理商： | 5962F9565401VXC |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁當(dāng)前第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁
SIZE
A
5962-94663
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216-5000
REVISION LEVEL
B
SHEET
32
DSCC FORM 2234
APR 97
TABLE IIA. Electrical test requirements.
Test requirements
Subgroups
(in accordance with
MIL-STD-883,
method 5005, table I)
Subgroups
(in accordance with
MIL-PRF-38535, table III)
Device
class M
Device
class Q
Device
class V
Interim electrical
parameters (see 4.2)
---
---
---
Final electrical
parameters (see 4.2)
1, 2, 3, 7, 8, 9,
10, 11 1/
1, 2, 3, 7, 8, 9,
10, 11 1/
1, 2, 3, 7, 8, 9,
10, 11 2/ 3/
Group A test
requirements (see 4.4)
1, 2, 3, 4, 7, 8, 9,
10, 11
1, 2, 3, 4, 7, 8, 9,
10, 11
1, 2, 3, 4, 7, 8, 9,
10, 11
Group C end-point electrical
parameters (see 4.4)
1, 7, 9
1, 7, 9
1, 7, 9
Group D end-point electrical
parameters (see 4.4)
1, 7, 9
1, 7, 9
1, 7, 9
Group E end-point electrical
parameters (see 4.4)
1, 7, 9
1, 7, 9
1, 7, 9
1/ PDA applies to subgroup 1.
2/ PDA applies to subgroups 1 and 7.
3/ Delta limits, as specified in table IIB herein, shall be required when specified and the delta values shall be
completed with reference to the zero hour electrical parameters.
TABLE IIB. Burn-in and operating life test, delta parameters (+25
°
C).
Parameter
Symbol
Delta limits
Quiescent current
I
DDQ
±
10% of measured values or
35
μ
A whichever is greater
NOTE: If the device is tested at or below 35
μ
A, no deltas are required.
4.4.2 Group C inspection. The group C inspection end-point electrical parameters shall be as specified in table IIA herein.
4.4.2.1 Additional criteria for device class M. Steady-state life test conditions, method 1005 of MIL-STD-883:
a.
Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level
control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify
the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test
method 1005 of MIL-STD-883.
b.
T
A
= +125
°
C, minimum.
c.
Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 5962F9565402VCC | Dual, 10-Bit, 40MHz, Current/Voltage Simultaneous-Output DACs |
| 5962F9565402VXC | Quad 2-input Exclusive OR (XOR) Gate |
| 5962F9565501VRC | 10-Bit, 40MHz, Current/Voltage-Output DACs |
| 5962F9565501VXC | 8-Bit D-Type Latch |
| 5962F9565502VRC | Dual, 10-Bit, 40MHz Current/Voltage Output DACs with Alternate Phase Update |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 5962F9568901QXC | 制造商:Intersil Corporation 功能描述: |
| 5962F9568901VXC | 制造商:Intersil Corporation 功能描述: |
| 5962F9568902QXC | 制造商:Intersil Corporation 功能描述: |
| 5962F9568902VXC | 制造商:Intersil Corporation 功能描述: |
| 5962F9666301QXC | 制造商:Intersil Corporation 功能描述: |