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參數(shù)資料
| 型號： | 5962F1023703QXC |
| 元件分類： | 多路復(fù)用及模擬開關(guān) |
| 英文描述： | 16-CHANNEL, SGL ENDED MULTIPLEXER, CDFP28 |
| 封裝： | CERAMIC, FLATPACK-28 |
| 文件頁數(shù)： | 2/21頁 |
| 文件大?。?/td> | 326K |
| 代理商： | 5962F1023703QXC |
10
TIMING CHARACTERISTICS (UT16MX116)1,2
(AVDD=5.0V + 0.5V, VDD=3.3V + 0.3V, GND=0V, VDD_IO=3.0V to 5.5V; -55°C < TC < +125°C)
.
SYMBOL
PARAMETER
CONDITION
MIN
TYP
MAX
UNIT
tPROP_S
Propagation delay of analog input
(S[x]) to analog output (COM)
RT=50Ω
CL=50pF
25
ns
tPROP_D
Propagation delay of any changes
in the digital inputs (A[3:0], CS,
PLATCH, SS) affecting the analog
output (COM)
RT=50Ω
CL=50pF
See Figures 4 & 9.
25
140
ns
tMUX
Mux decoding time
RT=50Ω
CL=50pF
See Figures 4 & 9.
50
ns
tBBM
Break-Before-Make-Delay
RT=50Ω
CL=50pF
See Figures 4 & 9.
15
90
ns
tAS13
The minimum amount of time
required for the address signals
(A[3:0]) to be stable before the
falling edge of CS
See Figure 4.
3.0
ns
tAS23
The minimum amount of time
required for the address signals
(A[3:0]) to be stable after the
rising edge of CS
See Figure 4.
5.0
ns
Notes:
1. For devices procured with a total ionizing dose tolerance guarantee, the post-irradiation performance is guaranteed at 25oC per MIL-STD-883 Method 1019,
Condition A up to the maximum TID level procured (see ordering information).
2. Continuous operation with low load resistance is not recommended. (See Figure 8)
3. Guaranteed by design.
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參數(shù)描述 |
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