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參數(shù)資料
| 型號： | 5962F1023306VXC |
| 元件分類： | 多路復(fù)用及模擬開關(guān) |
| 英文描述： | 16-CHANNEL, SGL ENDED MULTIPLEXER, CDFP28 |
| 封裝： | CERAMIC, DFP-28 |
| 文件頁數(shù)： | 19/23頁 |
| 文件大?。?/td> | 474K |
| 代理商： | 5962F1023306VXC |
5
Notes:
1. Bypass capacitor of 0.1
F required for proper operation. (See Figure 10)
2. Continuous operation with low load resistance is not recommended. (See Figure 11)
Table 3: UT16MX112 Pin Description
Pin No.
Name
I/O
Type
Description
1
AVDD
--
Power
Analog Positive Supply
2
RESET
Input
Digital
Active Low Reset with Internal Pull-up
3
NC
--
No Connection
4-11
S[15:8]
Input
Analog
Muxed Inputs
12
GND
--
Power
Digital Ground
13
3V_OUT1
Output
Power
Digital Power Bypass Connection
14
NC
--
No Connection
15
SCLK
Input
Digital
SPI Clock
16
MOSI
Input
Digital
Master-out-Slave-in (Din)
17
MISO
Output
Digital
Master-in-Slave-out (Dout)
18
SS
Input
Digital
SPI Shift Control with Internal Pull-up
19-26
S[0:7]
Input
Analog
Muxed Inputs
27
AVSS
--
Power
Analog Negative Supply
28
COM2
Output
Analog
Muxed Output
AVDD
RESET
NC
S15
S14
S13
S12
S11
S10
S9
S8
GND
3V_OUT
NC
COM
AVSS
S7
S6
S5
S4
S3
S2
S1
S0
SS
MISO
MOSI
SCLK
1
2
3
4
5
6
7
8
9
28
27
26
25
24
23
22
21
20
19
18
17
15
16
11
12
13
14
10
UT16MX112
Figure 4. UT16MX112 Pinout
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