
17
Multiplexer RESET Enable/Disable (UT16MX111/112)
Power Supply Requirements Schematic (UT16MX110/111/112)
COM, S[x]
tPLHZ
tPZLH
VDD_IO
50%
GND
HiZ
COM, S[0]
Note:
1. S[x] represents the analog signal channel connected to COM prior to the falling edge of RESET.
RESET
Figure 9. RESET Timing Diagram (Used for UT16MX111/112 only)
3V_OUT
AVDD
GND
AVSS
0.1 F
Note:
1. Bypass capacitor of 0.1F required on 3V_OUT for proper operation.
1
12
13
27
UT16MX110/111/112
Figure 10. Power Supply Requirements