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參數(shù)資料
| 型號(hào)： | 5962-9560011QUA |
| 廠商： | MICROSS COMPONENTS |
| 元件分類： | SRAM |
| 英文描述： | 512K X 8 STANDARD SRAM, 25 ns, CDSO32 |
| 封裝： | CERAMIC, SOJ-32 |
| 文件頁(yè)數(shù)： | 13/17頁(yè) |
| 文件大?。?/td> | 112K |
| 代理商： | 5962-9560011QUA |
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SRAM
AS5C4008
AS5C4008
Rev. 6.2 06/05
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
5
Austin Semiconductor, Inc.
NOTES
1.
All voltages referenced to V
SS (GND).
2.
-2V for pulse width < 20ns
3.
I
CC is dependent on output loading and cycle rates.
4.
This parameter is guaranteed but not tested.
5.
Test conditions as specified with the output loading
as shown in Fig. 1 unless otherwise noted.
6.
tLZCE, tLZWE, tLZOE, tHZCE, tHZOE and tHZWE
are specified with CL = 5pF as in Fig. 2. Transition is
measured ±200mV from steady state voltage.
7.
At any given temperature and voltage condition,
tHZCE is less than tLZCE, and tHZWE is less than
tLZWE.
8.
WE\ is HIGH for READ cycle.
9.
Device is continuously selected. Chip enables and
output enables are held in their active state.
10. Address valid prior to, or coincident with, latest
occurring chip enable.
11. tRC = Read Cycle Time.
12. Chip enable and write enable can initiate and
terminate a WRITE cycle.
13. Output enable (OE\) is inactive (HIGH).
14. Output enable (OE\) is active (LOW).
15. ASI does not warrant functionality nor reliability of any
product in which the junction temperature exceeds
150°C. Care should be taken to limit power to acceptable
levels.
Fig. 1 Output Load Equivalent
Fig. 2 Output Load Equivalent
167 ohms
1.73V
C=5pF
C=30pF
Q
DATA RETENTION ELECTRICAL CHARACTERISTICS (L Version Only)
AC TEST CONDITIONS
Input pulse levels ................................................... Vss to 3.0V
Input rise and fall times ....................................................... 3ns
Input timing reference levels ............................................ 1.5V
Output reference levels ..................................................... 1.5V
Output load ............................................... See Figures 1 and 2
DESCRIPTION
SYMBOL
MIN
MAX
UNITS
NOTES
VCC for Retention Data
VDR
2V
Data Retention Current
(L Version Only)
VCC = 2V
ICCDR
4.5
mA
Chip Deselect to Data
Retention Time
tCDR
0ns
4
Operation Recovery Time
tR
10
ms
4, 11
CE\ > (Vcc -0.2V)
VIN > (Vcc -0.2V) or < 0.2V
CONDITIONS
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