N
CLC532
High-Speed 2:1 Analog Multiplexer
General Description
The CLC532 is a high-speed 2:1 multiplexer with active input and
output stages. The CLC532 also employs a closed-loop design which
dramatically improves accuracy. This monolithic device is constructed
using an advanced high-performance bipolar process.
The CLC532 has been specifically designed to provide settling times
of 17ns to 0.01%. This, coupled with the adjustable noise-bandwidth,
makes the CLC532 an ideal choice for infrared and CCD imaging
systems.
Channel-to-channel isolation is better than 80dB @
10MHz. Low distortion (80dBc) and spurious signal levels make the
CLC532 a very suitable choice for both I/Q processors and receivers.
The CLC532 is offered over both the industrial and military temperature
ranges. The Industrial versions, CLC532AJP\AJE\AID, are specified
from -40°C to +85°C and are packaged in 14-pin plastic DIP's, 14-pin
SOIC's and 14-pin Side-Brazed packages. The extended temperature
versions, CLC532A8B/A8D/A8L-2, are specified from -55°C to +125°C
and are packaged in a 14-pin hermetic DIP and 20-terminal LCC
packages. (Contact factory for LCC and CERDIP availability.)
Ordering Information ...
CLC532AJP
-40oC to +85oC
14-pin plastic DIP
CLC532AJE
-40oC to +85oC
14-pin plastic SOIC
CLC532ALC
-40oC to +85oC
dice
CLC532AMC
-55oC to +125oC
dice, MIL-STD-833
CLC532A8B
-55oC to +125oC
14-pin CERDIP;
MIL-STD-883
CLC532A8L-2A
-55oC to +125oC
20-terminal LCC;
MIL-STD-883
Contact factory for other packages and DESC SMD number.
June 1999
CLC532
High-Speed
2:1
Analog
Multiplexer
Features
s
12-bit settling (0.01%) - 17ns
s
Low noise - 32
Vrms
s
High isolation - 80dB @ 10MHz
s
Low distortion - 80dBc @ 5MHz
s
Adjustable bandwidth - 190MHz (max)
Applications
s
Infrared system multiplexing
s
CCD sensor signals
s
Radar I/Q switching
s
High definition video HDTV
s
Test and calibration
Typical Application
Pinout
DIP & SOIC
20-Terminal LCC
RL
RIN
INB
10
6
INA
4
3
2
1
7
VOUT
12
CHANNEL A
CHANNEL B
CHANNEL
SELECT
CCOMP
2
CCOMP
1
CLC532
DREF
11
SELECT OUTPUT
1
Channel A
0
Channel B
GND
INA
GND
INB
DGND
DREF
SELECT
+VCC
COMP1
OUTPUT
COMP2
VEE
1
2
3
4
5
6
7
14
13
12
11
10
9
8
TOP VIEW
COMP
1
NC
OUTPUT
NC
COMP
2
14 15 1617 18
9
10
11
12
13
87654
3
2
1
20
19
DREF
SELECT
NC
VEE
DGND
NC
IN
B
NC
GND
INA
GND
NC
+Vcc
INDEX CORNER
1999 National Semiconductor Corporation
http://www.national.com
Printed in the U.S.A.