參數(shù)資料
型號(hào)： 5962-9169003MXA
廠商： ANALOG DEVICES INC
元件分類： ADC
英文描述： 1-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, CDIP28
封裝： CERAMIC, DIP-28
文件頁數(shù)： 15/18頁
文件大小： 355K
代理商： 5962-9169003MXA
REV. C
–6–
AD674B/AD774B
PIN FUNCTION DESCRIPTIONS
Symbol
Pin No.
Type
* Name and Function
AGND
9
P
Analog Ground (Common)
A0
4
DI
Byte Address/Short Cycle. If a conversion is started with A0 Active LOW, a full 12-bit conversion
cycle is initiated. If A0 is Active HIGH during a convert start, a shorter 8-bit conversion cycle
results. During Read (R/
C = 1) with 12/8 LOW, A
0 = LOW enables the 8 most significant bits,
and A0 = HIGH enables DB3–DB0 and sets DB7–DB4 = 0.
BIP OFF
12
AI
Bipolar Offset. Connect through a 50
resistor to REF OUT for bipolar operation or to Analog
Common for unipolar operation.
CE
6
DI
Chip Enable. Chip Enable is Active HIGH and is used to initiate a convert or read operation.
CS
3
DI
Chip Select. Chip Select is Active LOW.
DB11–DB8 27–24
DO
Data Bits 11 through 8. In the 12-bit format (see 12/
8 and A
0 pins) these pins provide the upper
4 bits of data. In the 8-bit format, they provide the upper 4 bits when A0 is LOW and are
disabled when A0 is HIGH.
DB7–DB4
23–20
DO
Data Bits 7 through 4. In the 12-bit format these pins provide the middle 4 bits of data. In the
8-bit format they provide the middle 4 bits when A0 is LOW and all zeroes when A0 is HIGH.
DB3–DB0
19–16
DO
Data Bits 3 through 0. In both the 12-bit and 8-bit format these pins provide the lower 4 bits of
data when A0 is HIGH; they are disabled when A0 is LOW.
DGND
15
P
Digital Ground (Common)
REF OUT
8
AO
10 V Reference Output
R/
C
5
DI
Read/Convert. In the full control mode R/
C is Active HIGH for a read operation and Active LOW
for a convert operation. In the standalone mode, the falling edge of R/
C initiates a conversion.
REF IN
10
AI
Reference Input is connected through a 50
resistor to +10 V Reference for normal operation.
STS
28
DO
Status is Active HIGH when a conversion is in progress and goes LOW when the conversion is
completed.
VCC
7
P
+12 V/+15 V Analog Supply
VEE
11
P
–12 V/–15 V Analog Supply
VLOGIC
1
P
5 V Logic Supply
10 VIN
13
AI
10 V Span Input, 0 V to +10 V unipolar mode or –5 V to +5 V bipolar mode. When using the
20 V Span, 10 VIN should not be connected.
20 VIN
14
AI
20 V Span Input, 0 V to +20 V unipolar mode or –10 V to +10 V bipolar mode. When using the
10 V Span, 20 VIN should not be connected.
12/
8
2
DI
The 12/
8 pin determines whether the digital output data is to be organized as two 8-bit words
(12/
8 LOW) or a single 12-bit word (12/8 HIGH).
*Types: AI = Analog Input, AO = Analog Output, DI = Digital Input, DO = Digital Output, P = Power
PIN CONFIGURATION
TOP VIEW
(Not to Scale)
28
27
26
25
24
23
22
21
20
19
18
17
16
15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
AD674B
OR
AD774B
VLOGIC
12/
8
CS
A0
R/
C
CE
VCC
REF OUT
AGND
REF IN
VEE
BIP OFF
10 VIN
20 VIN
STS
DB11 (MSB)
DB10
DB9
DB8
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0 (LSB)
DGND
相關(guān)PDF資料
PDF描述
5962-9169003M3A 3-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, CQCC28
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5962-9169102MXA 2-CH 16-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, CDIP28
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