參數(shù)資料
型號(hào)： 5962-9064202Q2A
廠商： TEXAS INSTRUMENTS INC
元件分類： ADC
英文描述： 11-CH 10-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, CQCC20
封裝： CERAMIC, LCC-20
文件頁(yè)數(shù)： 6/32頁(yè)
文件大?。?/td> 770K
代理商： 5962-9064202Q2A
www.ti.com
Access Cycle B
Shift in New Multiplexer Address;
Simultaneously Shift Out Previous
Conversion Value
Sample Cycle B
A/D Conversion
Interval
Initialize
MSB
LSB
Previous Conversion Data
MSB
LSB
B3
B2
B1
B0
C3
B9
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
1
2
3
4
5
6
7
8
9
10
1
I/O
CLOCK
DATA
OUT
ADDRESS
CS
EOC
Initialize
Low
Level
Hi-Z
See Note B
11
16
(see Note A)
SLAS052G – MARCH 1992 – REVISED JANUARY 2006
PARAMETER MEASUREMENT INFORMATION (continued)
A.
To minimize errors caused by noise at CS, the internal circuitry waits for a setup time plus two falling edges of the
internal system clock after CS
↓ before responding to control input signals. Therefore, no attempt should be made to
clock in an address until the minimum CS setup time has elapsed.
B.
A low-to-high transition of CS disables ADDRESS and the I/O CLOCK within a maximum of a setup time plus two
falling edges of the internal system clock.
Figure 11. Timing for 11- to 16-Clock Transfer Using
CS (Serial Transfer Interval Shorter Than Conversion)
14
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