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參數(shù)資料
| 型號： | 5962-8981702ZX |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | PROM |
| 英文描述： | 32K X 8 UVPROM, 45 ns, CQCC32 |
| 封裝： | CERAMIC, LCC-32 |
| 文件頁數(shù)： | 5/11頁 |
| 文件大小： | 245K |
| 代理商： | 5962-8981702ZX |
CY7C271
CY7C274
Document #: 38-04008 Rev. *B
Page 3 of 11
Capacitance[6]
Parameter
Description
Test Conditions
Max.
Unit
CIN
Input Capacitance
TA = 25°C, f = 1 MHz,
VCC = 5.0V
10
pF
COUT
Output Capacitance
10
pF
AC Test Loads and Waveforms[6]
3.0V
5V
OUTPUT
R1 500
658
MIL
R2 333
(403
MIL)
30 pF
INCLUDING
JIG AND
SCOPE
GND
90%
10%
90%
10%
5ns
5 ns
5V
OUTPUT
5pF
INCLUDING
JIG AND
SCOPE
(a) Normal Load
(b) High Z Load
OUTPUT
2.00V COMMERCIAL
Equivalent to:
THVENIN EQUIVALENT
200
ALL INPUT PULSES
OUTPUT
1.90V MILITARY
250
R1 500
658
MIL
R2 333
(403
MIL)
≤≤
Switching Characteristics Over the Operating Range[3,6]
7C274-30
7C271-35
7C274-35
7C271-45
7C274-45
7C271-55
Parameter
Description
Min.
Max.
Min.
Max.
Min.
Max.
Min.
Max.
Unit
tAA
Address to Output Valid
30
35
45
55
ns
tHZCS
Chip Select Inactive to High Z (CS1 and CS2,
7C271 Only)
20
25
30
ns
tACS
Chip Select Active to Output Valid (CS1 and CS2,
7C271 Only)
20
25
30
ns
tHZOE
Output Enable Inactive to High Z (OE, 7C274
Only)
20
25
ns
tOE
Output Enable Active to Output Valid (OE, 7C274
Only)
20
25
ns
tHZCE
Chip Enable Inactive to High Z (CE Only)
35
40
50
60
ns
tACE
Chip Enable Active to Output Valid (CE Only)
35
40
50
60
ns
tPU
Chip Enable Active to Power Up
0
ns
tPD
Chip Enable Inactive to Power Down
35
40
50
60
ns
tOH
Output Hold from Address Change
0
ns
Note:
6.
See Introduction to CMOS PROMs for general information on testing.
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