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參數(shù)資料
| 型號： | 5962-8967401XX |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | ADC |
| 英文描述： | 1-CH 14-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL/PARALLEL ACCESS, CQCC44 |
| 封裝： | CERAMIC, LCC-44 |
| 文件頁數(shù)： | 4/10頁 |
| 文件大?。?/td> | 337K |
| 代理商： | 5962-8967401XX |
MAX5712
12-Bit, Low-Power, Rail-to-Rail
Voltage-Output Serial DAC in SOT23
3
Maxim Integrated
Note 1: DC Specifications are tested without output loads.
Note 2: Linearity guaranteed from code 115 to code 3981.
Note 3: Offset and gain error limit the FSR.
Note 4: Guaranteed by design.
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
POWER REQUIREMENTS
Supply Voltage Range
VDD
2.7
5.5
V
All digital inputs at 0 or VDD, VDD = +3.6V
85
150
Supply Current with No-Load
IDD
All digital inputs at 0 or VDD, VDD = +5.5V
105
187
A
Power-Down Supply Current
IDDPD
All digital inputs at 0 or VDD, VDD = +5.5V
0.29
1
A
TIMING CHARACTERISTICS (FIGURE 1) (TIMING IS TESTED WITH NO-LOAD)
SCLK Clock Frequency
fSCLK
0
20
MHz
SCLK Pulse Width High
tCH
20
ns
SCLK Pulse Width Low
tCL
20
ns
CS Fall-to-SLCK Rise Setup
tCSS
15
ns
DIN Setup Time
tDS
15
ns
DIN Hold Time
tDH
0ns
SCLK Falling Edge-to-CS
Rising Edge
tCSH
10
ns
CS Pulse Width High
tCSW
80
ns
Typical Operating Characteristics
(TA = +25°C, unless otherwise noted.)
-16
-4
-8
-12
0
4
12
8
16
0
512 1024 1536 2048 2560 3072 3584 4096
INTEGRAL NONLINEARITY
vs. CODE, TA = +25
°C
MAX5712
toc01
CODE
INL
(LSB)
VDD = +5V
VDD = +3V
-0.2
-0.4
-0.6
-0.8
-1.0
0.2
0.0
0.4
0.8
0.6
1.0
0
512 1024 1536 2048 2560 3072 3584 4096
DIFFERENTIAL NONLINEARITY
vs. CODE, TA = +25
°C
MAX5712
toc02
CODE
DNL
(LSB)
-0.2
-0.4
-0.6
-0.8
-1.0
0.2
0.0
0.4
0.8
0.6
1.0
0
512 1024 1536 2048 2560 3072 3584 4096
TOTAL UNADJUSTED ERROR
vs. CODE, TA = +25
°C
MAX5712
toc03
CODE
TUE
(%)
VDD = +5V
VDD = +3V
ELECTRICAL CHARACTERISTICS (continued)
(VDD = +2.7V to +5.5V, GND = 0, RL = 5kΩ, CL = 200pF, TA = TMIN to TMAX, unless otherwise noted. Typical values are at VDD = +5V.
TA = +25°C)
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