參數(shù)資料
型號: 5962-8962902LX
廠商: ANALOG DEVICES INC
元件分類: 模擬信號調(diào)理
英文描述: SPECIALTY ANALOG CIRCUIT, CDIP24
封裝: CERDIP-24
文件頁數(shù): 7/21頁
文件大小: 485K
代理商: 5962-8962902LX
AD7569/AD7669
–15–
REV. B
an RD pulse for the AD7569/AD7669. This RD pulse accesses
data from the ADC and places the conversion result into a regis-
ter on the 74646. The rising edge of this pulse generates an in-
terrupt request to the processor. The conversion result is read
from the 74646 register by performing an I/O read to the
decoded address of the 74646. Writing data to the relevant
AD7569/AD7669 DAC involves an I/O write to the 74646,
which transfers the data to the data inputs of the AD7569/
AD7669. Data is latched into the selected DAC register on the
rising edge of IOW.
APPLYING THE AD7569/AD7669 DAC
An internal gain/offset network on the AD7569/AD7669 allows
several output voltage ranges. The part can produce unipolar
output ranges of 0 V to +1.25 V or 0 V to +2.5 V and bipolar
output ranges of –1.25 V to +1.25 V or –2.5 V to +2.5 V. Con-
nections for these various output ranges are outlined below.
UNIPOLAR (0 V to +1.25 V) CONFIGURATION
The first of the configurations provides an output voltage range
of 0 V to +1.25 V. This is achieved by tying the VSS and
RANGE inputs to AGNDDAC(= 0 V). Figure 21 shows the con-
figuration of the AD7569 to achieve this output range. A similar
configuration of the AD7669 gives the same output range. The
table for output voltage versus the digital code in the DAC regis-
ter is shown in Table IV.
Figure 21. AD7569 Unipolar (0 V to +1.25 V) Operation
Table IV. Unipolar (0 V to +1.25 V) Code Table
DAC Register Contents
MSB
LSB
Analog Output, VOUT
1111
+VREF
255
256
1000
0001
+VREF
129
256
1000
0000
+VREF
128
256
= +VREF/2
0111
1111
+VREF
127
256
0000
0001
+VREF
1
256
0000
0 V
NOTE: 1 LSB = (VREF) (2
–8) = V
REF (1/256); VREF = +1.25 V Nominal
UNIPOLAR (0 V to +2.5 V) CONFIGURATION
The 0 V to +2.5 V output voltage range is achieved by tying VSS
to AGNDDAC(= 0 V) and the RANGE input to VDD. The table
for output voltage versus digital code is as in Table IV with
2.VREF replacing VREF. Note that for this range
1 LSB
= 2.V
REF (2
8 ) = V
REF
1
128
BIPOLAR (–1.25 V to +1.25 V) CONFIGURATION
The first of the bipolar configurations is achieved by tying the
RANGE input to AGNDDAC(= 0 V) and VSS to –5 V. The VSS
voltage level at which the AD7569/AD7669 changes to bipolar
operation is approximately –1 V. When the part is configured
for bipolar outputs, the input coding becomes twos comple-
ment. The table for output voltage versus the digital code in the
DAC register is shown in Table V. Note as with the unipolar
configuration, a digital input code of all 0s produces an output
of 0 V. It should be noted, however, that a low pulse on the
RESET
line for the bipolar ranges sets the output voltage to
negative full scale.
Table V. Bipolar (–1.25 V to +1.25 V) Code Table
DAC Register Contents
MSB
LSB
Analog Output, VOUT
0111
1111
+VREF
127
128
0000
0001
+VREF
1
128
0000
0 V
1111
–VREF
1
128
1000
0001
–VREF
127
128
1000
0000
–VREF
128
= –VREF
NOTE: 1 LSB = (VREF)(2
–7) = V
REF (1/128)
BIPOLAR (–2.5 V to +2.5 V) CONFIGURATION
The –2.5 V to +2.5 V bipolar output range is achieved by tying
the RANGE input to VDD and the VSS input to –5 V. Once
again, the input coding is 2s complement. The table for output
voltage versus digital code is as in Table V with 2.VREF replacing
VREF. Note that for this range
1 LSB
= 4.V
REF (2
8 ) = V
REF
1
64
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