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參數(shù)資料
| 型號(hào)： | 5962-8959401HXC |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 緩沖放大器 |
| 英文描述： | BUFFER AMPLIFIER, MBCY12 |
| 封裝： | TO-8, 12 PIN |
| 文件頁數(shù)： | 4/6頁 |
| 文件大?。?/td> | 106K |
| 代理商： | 5962-8959401HXC |
DATA SHEET
KH231
4
REV. 1A February 2001
Operation
The KH231 Buffer/Amplifier is based on the current feed-
back op amp topology, a design that uses current feed-
back instead of the usual voltage feedback.
The use of the KH231 is basically the same as that of the
conventional op amp (see Figures 1 and 2). Since the
device is designed specifically for low gain applications,
the best performance is obtained when the circuit is used
at gains between ±1 and ±5. Additionally, performance is
optimum when a 250
feedback resistor is used.
Figure 1: Recommended non-inverting gain circuit
Figure 2: Recommended inverting gain circuit
Layout Considerations
To assure optimum performance the user should follow
good layout practices which minimize the unwanted
coupling of signals between nodes. During initial bread-
boarding of the circuit use direct point to point wiring,
keeping the lead lengths to less than 0.25”. The use of
solid, unbroken ground plane is helpful. Avoid wire-wrap
type pc boards and methods. Sockets with small, short
pin receptacles may be used with minimal performance
degradation although their use is not recommended.
During pc board layout keep all traces short and direct
The resistive body of Rg should be as close as possible
to pin 5 to minimize capacitance at that point. For the
same reason, remove ground plane from the vicinity of
pins 5 and 6. In other areas, use as much ground plane
as possible on one side of the board. It is especially
important to provide a ground return path for current from
the load resistor to the power supply bypass capacitors.
Ceramic capacitors of 0.01 to 0.1
f (with short leads)
should be less than 0.15 inches from pins 1 and 9.
Larger tantalum capacitors should be placed within one
inch of these pins. VCC connections to pins 10 and 12
can be made directly from pins 9 and 1, but better supply
rejection and settling time are obtained if they are
separately bypassed as in figures 1 and 2. To prevent
signal distortion caused by reflections from impedance
mismatches, use terminated microstrip or coaxial cable
when the signal must traverse more than a few inches.
Since the pc board forms such an important part of the
circuit, much time can be saved if prototype boards of any
high frequency sections are built and tested early in the
design phase.
Evaluation boards designed for either
inverting or non-inverting gains are available.
Distortion and Noise
The graphs of intercept point, I2 and I3, versus
frequency on the preceding page make it easy to predict
the distortion at any frequency given the output voltage of
the KH231. First, convert the output voltage (Vo) to Vrms
= (Vpp/2√2) and then to P = [(10log10(20Vrms
2)] to get the
power output in dBm. At the frequency of interest, its 2nd
harmonic will be S2 = (I2-P)dB below the level of P. Its
third harmonic will be S3 = 2(I3- P)dB below P, as will the
two-tone third order intermodulation products. These
approximations are useful for P < -1dB compression levels.
Approximate noise figure can be determined for the
KH231 using the equivalent input noise graph on the
preceding page. The following equation can be used to
determine noise figure (F) in dB.
Where Vn is the rms noise voltage and in is the rms noise
current. Beyond the breakpoint of the curves (i.e., where
they are flat), broadband noise figure equals spot noise fig-
ure, so
f should equal one (1) and Vn and in should be
read directly off the graph. Below the breakpoint, the noise
must be integrated and
f set to the appropriate bandwidth.
33
+15V
0.1
3.9
.01
Capactance in
F
1
12
5
3,7
RL
100
10
11
33
.01
0.1
3.9
-15V
9
+
-
KH231
Vo
Rf = 250
6
Rg
Vin
Ri
49.9
A
R
v
f
g
= 1+
250
33
+15V
0.1
3.9
.01
Capactance in
F
1
12
5
3,7
RL
100
10
11
33
.01
0.1
3.9
-15V
9
+
-
KH231
Vo
Rf = 250
For Zin = 50
, select
Rg || Ri = 50
6
100
Vin
Ri
250
Rg
A
R
v
f
g
=
F
10log 1
V
iR
A
4kTR
f
n
2
n
2
f
2
v
2
s
=+
+
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