OPERATION AND APPLICATION INFORMATION
Setting a Fault Window
ADJ
V
2.5 V ±
4
(1)
(
)
S
ADJ
V ± 10 × V
%
(2)
Hysteresis
Fault
Window
Fault
Window
NoFault
Fault
25
20
15
10
5
0
-5
-10
-15
-20
-25
SupplyFaultW
indow-%
0
0.5
1
1.5
2
2.5
Window AdjustVoltage(V
)atPin4
ADJ
3.125
3
2.875
2.750
2.625
2.5
2.25
2.125
2
2.375
1.875
FaultW
indowatSenseInputs-V
SLUS233A – OCTOBER 1999 – REVISED SEPTEMBER 2008 ........................................................................................................................................ www.ti.com
The fault thresholds on the UC1903 are generated by creating positive and negative offsets, equal in magnitude,
that are referenced to the chip’s 2.5-V reference. The resulting fault window is centered around 2.5 V and has a
magnitude equal to that of the applied offsets. Simplified schematics of the fault window and reference circuits
are shown in
Figure 1 along with the Typical Characteristics diagrams. The magnitude of the offsets is
determined by the voltage applied at the window adjust pin, Pin 4. A bias cancellation circuit keeps the input
current required at Pin 4 low, allowing the use of a simple resistive divider off the reference to set the adjust pin
voltage.
The adjust voltage at Pin 4 is internally applied across R4, and an 8-k
resistor. The resulting current is mirrored
four times to generate current sources IOA, IOB, IOC, and IOD, all equal in magnitude. When all four of the sense
inputs are inside the fault window, a no-fault condition, Q4 and Q5 are turned on. In combination with D1 and D2
this prevents LOB and LOD from affecting the fault thresholds. In this case, the OV and UV thresholds are equal to
VREF + IOA(R5 + R6) and VREF – IOC(R7 + R8) respectively. The fault window can be expressed as:
In terms of a sensed nominal voltage level, VS, the window as a percent variation is:
When a sense input moves outside the fault window given in
Equation 1, the appropriate hysteresis control signal
turns off Q4 or Q5. For the under-voltage case, Q5 is disabled and current source IOB flows through D2. The net
current through R7 becomes zero as IOB cancels IOC, giving an 8% reduction in the UV threshold offset. The
overvoltage case is the same, with Q4 turning off, allowing IOD to cancel the current flow, IOA, through R6. The
result is a hysteresis at the sense inputs which is always 8% of the window magnitude. This is shown graphically
Figure 2. Fault Window and Threshold Hysteresis Scale as a Function of the Voltage Applied at Pin 4
6
Copyright 1999–2008, Texas Instruments Incorporated