參數(shù)資料
型號: 5962-8770001EA
廠商: TEXAS INSTRUMENTS INC
元件分類: DAC
英文描述: PARALLEL, 8 BITS INPUT LOADING, 8-BIT DAC, CDIP16
封裝: CERAMIC, DIP-16
文件頁數(shù): 8/12頁
文件大?。?/td> 256K
代理商: 5962-8770001EA
AD7524M
Advanced LinCMOS 8BIT MULTIPLYING
DIGITALTOANALOG CONVERTER
SGLS028A SEPTEMBER 1989 REVISED MARCH 1995
5
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
POST OFFICE BOX 1443
HOUSTON, TEXAS 772511443
PRINCIPLES OF OPERATION
The AD7524M is an 8-bit multiplying D/A converter consisting of an inverted R-2R ladder, analog switches, and
data input latches. Binary weighted currents are switched between the OUT1 and OUT2 bus lines, thus
maintaining a constant current in each ladder leg independent of the switch state. The high-order bits are
decoded and these decoded bits, through a modification in the R-2R ladder, control three equally weighted
current sources. Most applications only require the addition of an external operational amplifier and a voltage
reference.
The equivalent circuit for all digital inputs low is seen in Figure 1. With all digital inputs low, the entire reference
current, Iref, is switched to OUT2. The current source 1/256 represents the constant current flowing through the
termination resistor of the R-2R ladder, while the current source IIkg represents leakage currents to the
substrate. The capacitances appearing at OUT1 and OUT2 are dependent upon the digital input code. With all
digital inputs high, the off-state switch capacitance (30 pF maximum) appears at OUT2 and the on-state switch
capacitance (120 pF maximum) appears at OUT1. With all digital inputs low, the situation is reversed as shown
in Figure 1. Analysis of the circuit for all digital inputs high is similar to Figure 1; however, in this case, Iref would
be switched to OUT1.
Interfacing the AD7524M D/A converter to a microprocessor is accomplished via the data bus and the CS and
WR control signals. When CS and WR are both low, the AD7524M analog output responds to the data activity
on the DB0DB7 data bus inputs. In this mode, the input latches are transparent and input data directly affects
the analog output. When either the CS signal or WR signal goes high, the data on the DB0DB7 inputs are
latched until the CS and WR signals go low again. When CS is high, the data inputs are disabled regardless
of the state of the WR signal.
The AD7524M is capable of performing 2-quadrant or full 4-quadrant multiplication. Circuit configurations for
2-quadrant or 4-quadrant multiplication are shown in Figures 2 and 3. Input coding for unipolar and bipolar
operation are summarized in Tables 1 and 2, respectively.
相關(guān)PDF資料
PDF描述
5962-8770002EX PARALLEL, 8 BITS INPUT LOADING, 8-BIT DAC, CDIP16
5962-8770003EX PARALLEL, 8 BITS INPUT LOADING, 8-BIT DAC, CDIP16
5962-8770101RX DUAL, PARALLEL, 8 BITS INPUT LOADING, 8-BIT DAC, CDIP20
5962-8770102RX DUAL, PARALLEL, 8 BITS INPUT LOADING, 8-BIT DAC, CDIP20
5962-8770103RX DUAL, PARALLEL, 8 BITS INPUT LOADING, 8-BIT DAC, CDIP20
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