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參數(shù)資料
| 型號： | 5962-0724701VXA |
| 元件分類： | DAC |
| 英文描述： | PARALLEL, WORD INPUT LOADING, 0.0035 us SETTLING TIME, 14-BIT DAC, CBGA192 |
| 封裝： | CERAMIC, BGA-192 |
| 文件頁數(shù)： | 14/28頁 |
| 文件大?。?/td> | 952K |
| 代理商： | 5962-0724701VXA |
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DAC Transfer Function
www.ti.com............................................................................................................................................................................................... SGLS386 – JANUARY 2009
The DAC5670 has a current sink output. The current flow through IOUT_P and IOUT_N is controlled by
Dx_P[13:0] and Dx_N[13:0]. For ease of use, we denote D[13:0] as the logical bit equivalent of Dx_P[13:0] and
its complement Dx_N[13:0]. The DAC5670 supports straight binary coding with D13 being the MSB and D0 the
LSB. Full-scale current flows through IOUTP when all D[13:0] inputs are set high and through IOUTN when all
D[13:0] inputs are set low. The relationship between IOUT_P and IOUT_N can be expressed as Equation 1:
IOUT_N = IO(FS) - IOUT_P
(1)
IO(FS) is the full-scale output current sink (5 mA to 30 mA). Since the output stage is a current sink, the current
can only flow from AVDD through the load resistors RL into the IOUT_N and IOUT_P pins.
The output current flow in each pin driving a resistive load can be expressed as shown in Figure 21, as well as in
Figure 21. Relationship between D[13:0], IOUT_N and IOUT_P
IOUT_N = (IOUT(FS) x (16383 - CODE)) / 16384
(2)
IOUT_P = (IOUT(FS) x CODE) / 16384
(3)
where CODE is the decimal representation of the DAC input word. This would translate into single-ended
voltages at IOUT_N and IOUT_P, as shown in Equation 4 and Equation 5:
VOUTN = AVDD - IOUT_N x RL
(4)
VOUTP = AVDD - IOUT_P x RL
(5)
For example, assuming that D[13:0] = 1 and that RL is 50 , the differential voltage between pins IOUT_N and
VOUTN = 3.3 V - 0 mA x 50
= 3.3 V
(6)
VOUTP = 3.3 V - 20 mA x 50
= 2.3 V
(7)
VDIFF = VOUTN - VOUTP = 1 V
(8)
If D[13:0] = 0, then IOUT_P = 0 mA and IOUT_N = 20 mA and the differential voltage VDIFF = –1 V.
The output currents and voltages in IOUT_N and IOUT_P are complementary. The voltage, when measured
differentially, will be doubled compared to measuring each output individually. Care must be taken not to exceed
the compliance voltages at the IOUT_N and IOUT_P pins in order to keep signal distortion low.
Copyright 2009, Texas Instruments Incorporated
21
Product Folder Link(s): DAC5670-SP
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