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參數(shù)資料
| 型號： | 5962-0720401VXC |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | DAC |
| 英文描述： | PARALLEL, WORD INPUT LOADING, 0.012 us SETTLING TIME, 14-BIT DAC, CQFP52 |
| 封裝： | CERAMIC, QFP-52 |
| 文件頁數(shù)： | 9/23頁 |
| 文件大?。?/td> | 579K |
| 代理商： | 5962-0720401VXC |
CLK
CLKC
C
AC
R
T
50
R
T
50
V
TT
CAC
0.01 F
Differential
ECL
or
(LV)PECL
Source
+
DAC5675A
CLK
CLKC
0.01 F
R
OPT
22
TTL/CMOS
Source
Node CLKC
Internally Biased to
AVDD/2
DAC5675A
www.ti.com ..................................................................................................................................................... SGLS387D – JULY 2007 – REVISED OCTOBER 2009
Figure 20. Driving the DAC5675A With a Differential ECL/PECL Clock Source
Figure 21. Driving the DAC5675A With a Single-Ended TTL/CMOS Clock Source
Supply Inputs
The DAC5675A comprises separate analog and digital supplies, (AVDD and DVDD) respectively. These supply
inputs can be set independently from 3.6 V down to 3.15 V.
DAC Transfer Function
The DAC5675A has a current sink output. The current flow through IOUT1 and IOUT2 is controlled by D[13:0]A
and D[13:0]B. For ease of use, D[13:0] is denoted as the logical bit equivalent of D[13:0]A and its complement
D[13:0]B. The DAC5675A supports straight binary coding with D13 being the MSB and D0 the LSB. Full-scale
current flows through IOUT2 when all D[13:0] inputs are set high and through IOUT1 when all D[13:0] inputs are
set low. The relationship between IOUT1 and IOUT2 can be expressed as Equation 1:
(1)
IO(FS) is the full-scale output current sink (2 mA to 20 mA). Because the output stage is a current sink, the current
can only flow from AVDD through the load resistors RL into the IOUT1 and IOUT2 pins.
The output current flow in each pin driving a resistive load can be expressed as shown in Figure 22, as well as in
Figure 22. Relationship Between D[13:0], IOUT1 and IOUT2
Copyright 2007–2009, Texas Instruments Incorporated
17
Product Folder Link(s): DAC5675A-SP
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