參數(shù)資料
型號: 5962-0423401KXA
元件分類: 電源模塊
英文描述: 3-OUTPUT 30 W DC-DC REG PWR SUPPLY MODULE
封裝: HEMETIC SEALED, CERAMIC PACKAGE-12
文件頁數(shù): 10/12頁
文件大?。?/td> 78K
代理商: 5962-0423401KXA
STANDARD
MICROCIRCUIT DRAWING
SIZE
A
5962-04234
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
REVISION LEVEL
SHEET
7
DSCC FORM 2234
APR 97
TABLE I. Electrical performance characteristics - Continued.
Limits
Test
Symbol
Conditions
-55
°C ≤ T
C ≤ +125°C
VIN = 28 V dc ±5%, CL = 0
unless otherwise specified
Group A
subgroups
Device
type
Min
Max
Unit
Input step, 19 V to/from
50 V dc,
IOUT = 3000 mA (main)
-350
+350
Output response to step line
changes 7/ 12/
VTLN
Input step, 19 V to/from
50 V dc,
IOUT = ±500 mA ( dual)
4,5,6
01
-1050
+1050
mV pk
Input step, 19 V to/from
50 V dc,
IOUT = 3000 mA (main)
500
Recovery time, step line
changes 7/ 11/ 12/
TLN
Input step, 19 V to/from
50 V dc,
IOUT = ±500 mA (dual)
4,5,6
01
500
s
Minimum load to 100% load
(main)
100
Turn on overshoot 4/ 13/
VOS
Minimum load to 100% load
(dual)
4,5,6
01
500
mV
Turn on delay 13/
TDLY
Minimum load to 100% load
4,5,6
01
5
20
ms
1/
Parameter verified during line and load regulation tests.
2/
Up to 750 mA is available from the dual outputs provided the total output power does not exceed 30 watts.
3/
Guaranteed for a DC to 2 MHz bandwidth. Tested using a 20 kHz to 2 MHz bandwidth.
4/
Parameter measured from 28 V to 19 V or to 50 V while loads remain fixed.
5/
Parameter measured from nominal to minimum or maximum load conditions while line remains fixed.
6/
Load current is fixed for output under test while other output loads are varied for any combination of minimum to
maximum.
7/
Parameter is tested as part of design characterization or after design changes. Thereafter, parameter shall be
guaranteed to the limits specified.
8/
Capacitive load may be any value from 0 to the maximum limit without compromising dc performance.
9/
Load transient rate of change, dv/dt
≤ 50 V/s.
10/
Load current is stepped for output under test while other outputs are fixed at half rated load.
11/
Recovery time is measured from the initiation of the transient to where VOUT has returned to within ±1% of its steady
state value.
12/
Line transient rate of change, di/dt
≤ 2 A/s.
13/
Turn-on delay time is measured from either a step application of input power or a logic low to a logic high transition on
the enable pin (pin 3) while power is applied to the input.
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