![](http://datasheet.mmic.net.cn/90000/5962-005300HXA_datasheet_3474115/5962-005300HXA_12.png)
This information applies to a product which is in development. Specifications are subject to change without notice. Contact factory for most
recent information. Analog Devices Sensitive Material - not to be reproduced or distributed without permission.
Rev. Pr E
12
LAYOUT INFORMATION
The schematic of the evaluation board (Figure 9.) represents a typical
implementation of the AD13280. The pinout of the AD13280 is very
straightforward and facilitates ease of use and the implementation of
high frequency/high resolution design practices. It is recommended that
high quality ceramic chip capacitors be used to decouple each supply
pin to ground directly at the device. All capacitors can be standard high
quality ceramic chip capacitors.
Care should be taken when placing the digital output runs. Because the
digital outputs have such a high-slew rate, the capacitive loading on the
digital outputs should be minimized. Circuit traces for the digital
outputs should be kept short and connect directly to the receiving gate.
Internal circuitry buffers the outputs of the ADC through a resistor
network to eliminate the need to externally isolate the device from the
receiving gate.
EVALUATION BOARD
The AD13280 evaluation board (Figure 10.) is designed to provide
optimal performance for evaluation of the AD13280 analog-to-digital
converter. The board encompasses everything needed to insure the
highest level of performance for evaluating the AD13280. The board
requires an analog input signal, encode clock and power supply inputs.
The clock is buffered on-board to provide clocks for the latches. The
digital outputs and out clocks are available at the standard 40-pin
connectors J1 and J2.
Power to the analog supply pins is connected via banana jacks. The
analog supply powers the associated components and the analog section
of the AD13280. The digital outputs of the AD13280 are powered via
banana jacks with 3.3V. Contact the factory if additional layout or
applications assistance is required.
AD13280
Figure 9. Evaluation Board Mechanical Layout