參數(shù)資料
型號(hào)： 5962-0053001HXC
廠商： ANALOG DEVICES INC
元件分類： ADC
英文描述： DUAL 1-CH 12-BIT PROPRIETARY METHOD ADC, SERIAL ACCESS, CQFP68
封裝： CERAMIC, LCC-68
文件頁(yè)數(shù)： 16/20頁(yè)
文件大?。?/td> 4809K
代理商： 5962-0053001HXC
REV. A
AD13280
–5–
PIN FUNCTION DESCRIPTIONS
Pin Number
Mnemonic
Function
1, 35
SHIELD
Internal Ground Shield between Channels
2, 3, 9, 10, 13, 16
AGNDA
A Channel Analog Ground. A and B grounds should be connected as close to the device as possible.
4
A–IN
Inverting Differential Input (Gain = 1)
5
A+IN
Noninverting Differential Input (Gain = 1)
6
AMP-OUT-A
Single-Ended Amplifier Output (Gain = 2)
7
AMP-IN-A-1
Analog Input for A Side ADC (Nominally
±0.5 V)
8
AMP-IN-A-2
Analog Input for A Side ADC (Nominally
±1.0 V)
11
AVEEAA Channel Analog Negative Supply Voltage (Nominally –5.0 V or –5.2 V)
12
AVCCAA Channel Analog Positive Supply Voltage (Nominally 5.0 V)
14
ENCODEA
Complement of Encode; Differential Input
15
ENCODEA
Encode Input; Conversion Initiated on Rising Edge
17
DVCCAA Channel Digital Positive Supply Voltage (Nominally 5.0 V/ 3.3 V)
18, 19, 37, 38
NC
No Connect
20–25, 28–33
D0A–D11A
Digital Outputs for ADC A. D0 (LSB)
26, 27
DGNDA
A Channel Digital Ground
34
DROUTA
Data Ready A Output
36
DROUTB
Data Ready B Output
39–42, 45–52
D0B–D11B
Digital Outputs for ADC B. D0 (LSB)
43, 44
DGNDB
B Channel Digital Ground
53
DVCCBB Channel Digital Positive Supply Voltage (Nominally 5.0 V/ 3.3 V)
54, 57, 60, 61, 67, 68
AGNDB
B Channel Analog Ground. A and B grounds should be connected as close to the device as possible.
55
ENCODEB
Encode Input. Conversion initiated on rising edge.
56
ENCODEB
Complement of Encode. Differential input.
58
AVCCBB Channel Analog Positive Supply Voltage (Nominally 5.0 V)
59
AVEEBB Channel Analog Negative Supply Voltage (Nominally –5.0 V or –5.2 V)
62
AMP-IN-B-2
Analog Input for B Side ADC (Nominally
±1.0 V)
63
AMP-IN-B-1
Analog Input for B Side ADC (Nominally
±0.5 V)
64
AMP-OUT-B
Single-Ended Amplifier Output (Gain = 2)
65
B+IN
Noninverting Differential Input (Gain = 1)
66
B–IN
Inverting Differential Input (Gain = 1)
PIN CONFIGURATION
10
11
12
13
14
15
16
17
18
19
20
22
23
24
25
26
21
27
43
28 29 30 31 32 33 34 35 36 37 38 39 40 41 42
961
8765
68 67 66 65 64 63 62
4321
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
PIN 1
IDENTIFIER
TOP VIEW
(Not to Scale)
AD13280
AGNDB
AVEEB
AVCCB
AGNDB
D10A
DROUTB
AGNDA
AVEEA
D0A(LSB)
D1A
D2A
D3A
D4A
D5A
AGNDB
ENCODEB
DVCCB
D0B(LSB)
AGNDA
AMP-OUT-A
A+IN
A–IN
AGNDA
AMP-IN-A-2
AMP-IN-A-1
AGNDB
SHIELD
D1B
D2B
D3B
DGNDA
D11B(MSB)
D10B
D9B
DGNDB
AVCCA
AGNDB
B–IN
B+IN
AGNDB
AMP-IN-B-2
AMP-OUT-B
AMP-IN-B-1
D8B
D7B
D6B
D5B
D4B
DGNDB
NC
SHIELD
DROUTA
D11A(MSB)
D8A
D9A
D7A
D6A
DGNDA
ENCODEA
AGNDA
DVCCA
NC
NC = NO CONNECT
NC
相關(guān)PDF資料
PDF描述
5962-0053001HXX DUAL 1-CH 12-BIT PROPRIETARY METHOD ADC, SERIAL ACCESS, CQFP68
5962-0053001HXC DUAL 1-CH 12-BIT PROPRIETARY METHOD ADC, SERIAL ACCESS, CQFP68
5962-005300HXA DUAL 1-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, CQFP68
5962-005300HXX DUAL 1-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, CQFP68
5962-0150601HXX DUAL 1-CH 14-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, CQFP68
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