參數(shù)資料
型號(hào)： 570ABC000419DG
廠商： SILICON LABORATORIES
元件分類： XO, clock
英文描述： CRYSTAL OSCILLATOR, CLOCK, 10 MHz - 280 MHz, LVPECL OUTPUT
封裝： ROHS COMPLIANT PACKAGE-8
文件頁數(shù)： 30/30頁
文件大?。?/td> 361K
代理商： 570ABC000419DG
Si570/Si571
Rev. 1.1
9
Phase Jitter (RMS)2,4
for FOUT 10 to 160 MHz
CMOS Output Only
φJ
Kv = 33 ppm/V
12 kHz to 20 MHz (OC-48)
50 kHz to 80 MHz (OC-192)
—
0.63
0.62
—
ps
Kv = 45 ppm/V
12 kHz to 20 MHz (OC-48)
50 kHz to 80 MHz (OC-192)
—
0.63
0.62
—
Kv = 90 ppm/V
12 kHz to 20 MHz (OC-48)
50 kHz to 80 MHz (OC-192)
—
0.67
0.66
—
Kv = 135 ppm/V
12 kHz to 20 MHz (OC-48)
50 kHz to 80 MHz (OC-192)
—
0.74
0.72
—
Kv = 180 ppm/V
12 kHz to 20 MHz (OC-48)
50 kHz to 80 MHz (OC-192)
—
0.83
0.8
—
Kv = 356 ppm/V
12 kHz to 20 MHz (OC-48)
50 kHz to 80 MHz (OC-192)
—
1.26
1.2
—
Table 6. CLK± Output Phase Jitter (Si571) (Continued)
Parameter
Symbol
Test Condition
Min
Typ
Max
Units
Notes:
1. Differential Modes: LVPECL/LVDS/CML. Refer to AN255, AN256, and AN266 for further information.
2. For best jitter and phase noise performance, always choose the smallest KV that meets the application’s minimum APR
requirements. See “AN266: VCXO Tuning Slope (KV), Stability, and Absolute Pull Range (APR)” for more information.
3. See “AN255: Replacing 622 MHz VCSO devices with the Si550 VCXO” for comparison highlighting power supply
rejection (PSR) advantage of Si55x versus SAW-based solutions.
4. Single ended mode: CMOS. Refer to the following application notes for further information:
“AN255: Replacing 622 MHz VCSO Device with the Si55x VCXO”
“AN256: Integrated Phase Noise”
“AN266: VCXO Tuning Slope (Kv), Stability, and Absolute Pull Range (APR)”
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
570ABC000481DG 制造商:Silicon Laboratories Inc 功能描述:
570ABC3 制造商: 功能描述:
570ABC4 制造商: 功能描述:
570ACA000105DG 制造商:Silicon Laboratories Inc 功能描述:OSCILLATOR - Trays
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