參數(shù)資料
型號: 570ABB000116DGR
廠商: SILICON LABORATORIES
元件分類: XO, clock
英文描述: CRYSTAL OSCILLATOR, CLOCK, 10 MHz - 810 MHz, LVPECL OUTPUT
封裝: ROHS COMPLIANT PACKAGE-8
文件頁數(shù): 5/30頁
文件大?。?/td> 361K
代理商: 570ABB000116DGR
Si570/Si571
Rev. 1.1
13
3. Functional Description
The Si570 XO and the Si571 VCXO are low-jitter
oscillators ideally suited for applications requiring
programmable
frequencies.
The
Si57x
can
be
programmed to generate virtually any output clock in
the range of 10 MHz to 1.4 GHz. Output jitter
performance exceeds the strict requirements of high-
speed communication systems including OC-192/STM-
64 and 10 Gigabit Ethernet (10 GbE).
The Si57x consists of a digitally-controlled oscillator
(DCO) based on Silicon Laboratories' third-generation
DSPLL technology, which is driven by an internal fixed-
frequency crystal reference.
The device's default output frequency is set at the
factory and can be reprogrammed through the two-wire
I2C serial port. Once the device is powered down, it will
return to its factory-set default output frequency.
While the Si570 outputs a fixed frequency, the Si571
has a pullable output frequency using the voltage
control input pin. This makes the Si571 an ideal choice
for high-performance, low-jitter, phase-locked loops.
3.1. Programming a New Output
Frequency
The
output
frequency
(fout) is determined by
programming the DCO frequency (fDCO) and the
device's output dividers (HS_DIV, N1). The output
frequency is calculated using the following equation:
The DCO frequency is adjustable in the range of 4.85 to
5.67 GHz by setting the high-resolution 38-bit fractional
multiplier (RFREQ). The DCO frequency is the product
of the internal fixed-frequency crystal (fXTAL) and
RFREQ.
The 38-bit resolution of RFREQ allows the DCO
frequency to have a programmable frequency resolution
of 0.09 ppb.
As shown in Figure 3, the device allows reprogramming
of the DCO frequency up to ±3500 ppm from the center
frequency configuration without interruption to the
output clock. Changes greater than the ±3500 ppm
window will cause the device to recalibrate its internal
tuning circuitry, forcing the output clock to momentarily
stop and start at any arbitrary point during a clock cycle.
This re-calibration process establishes a new center
frequency and can take up to 10 ms. Circuitry receiving
a clock from the Si57x device that is sensitive to glitches
or runt pulses may have to be reset once the
recalibration process is complete.
3.1.1. Reconfiguring the Output Clock for a Small
Change in Frequency
For output changes less than ±3500 ppm from the
center frequency configuration, the DCO frequency is
the only value that needs reprogramming. Since
fDCO =fXTAL x RFREQ, and that fXTAL is fixed, changing
the DCO frequency is as simple as reconfiguring the
RFREQ value as outlined below:
1. Using the serial port, read the current RFREQ value
(registers 0x08–0x12).
2. Calculate the new value of RFREQ given the change
in frequency.
3. Using the serial port, write the new RFREQ value
(registers 0x08—0x12).
Example:
An Si570 generating a 148.35 MHz clock must be
reconfigured "on-the-fly" to generate a 148.5 MHz clock.
This represents a change of +1011.122 ppm, which is
well within the ±3500 ppm window.
Figure 3. DCO Frequency Range
fout
fDCO
Output Dividers
-----------------------------------------
fXTAL RFREQ
×
HSDIV N1
×
-------------------------------------------
==
RFREQnew
RFREQcurrent
fout_new
fout_current
-------------------------
×
=
4.85 GHz
5.67 GHz
Center
Frequency
Configuration
-3500 ppm
+3500 ppm
small frequency changes can be made
“on-the-fly” without interruption to the
output clock
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