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參數(shù)資料
| 型號(hào)： | 5503DCR |
| 英文描述： | Direct Conversion Receiver |
| 中文描述： | 直接轉(zhuǎn)換接收器 |
| 文件頁(yè)數(shù)： | 2/11頁(yè) |
| 文件大?。?/td> | 381K |
| 代理商： | 5503DCR |
5503 DCR
Direct Conversion Receiver
FUNCTIONAL DESCRIPTION
2
AGC Amplifier
The 5503 RF input can be driven differentially or
single ended. The
RFp
and
RFn
inputs are self-
biasing and are designed to be driven from a 50
Ohm source. For single-ended operation, the
RFn
pin should be AC coupled to analog ground. A gain
control input, AGC, provides a 22 dB gain variation
with 0V providing minimum gain and 4V providing
maximum gain.
I/Q Mixer
The AGC amplifier drives the RF port of two identical
double balanced mixers. The LO ports of these
mixers are driven from an on-chip quadrature
network.
Low Pass Filtering and Buffering
Following each mixer is a buffer amplifier for driving
an external passive low-pass filter. An external
series resistor connected to the
IO1
or
QO1
output
is used to provide the source match for the filter. A
second high impedance buffer amplifier is provided
(
IIN
or
QIN
) for additional gain and isolation after the
filter. The figure below shows a typical filter
designed for 20 Megasymbol per second operation:
Dual VCO
The 5503 uses two VCOs to cover the entire
specified tuning range. Both VCOs use nearly
identical architecture with the only difference being
slight design modifications to optimize the range of
operation. The lower range VCO requires an
external resonator that supports a tuning range of
950 to 1150 MHz. The higher range VCO requires a
similar resonator with inductor values designed to
support the range of 1100 to 1475 MHz. A typical
lumped-element
resonator
varactor tuning is shown in the following figure:
circuit
incorporating
Note: A separate resonator circuit is required for
each oscillator
PLL Synthesizer
The synthesizer derives its reference from a source
which can be either an externally derived clock or an
external crystal coupled to the internal oscillator.
This source drives a programmable reference divider
with 15 preset divide ratios from 2 to 320. This
output provides the PLL reference by driving one
input of a phase/frequency detector. The VCO
output drives a divider chain incorporating a
selectable divide by two prescaler followed by a
variable modulus prescaler and divider. The divider
is programmed by a 17-bit control word. This divider
chain output drives the other input of the
phase/frequency detector.
Loop Filter
The phase/frequency detector provides two output
pairs,
FILN
/
EON
and
FILP
/
EOP
. The
FILN
/
EON
outputs are used when the VCO has a positive gain
characteristic (increasing voltage yields increasing
frequency). The
FILP
/
EOP
outputs are used for a
negative VCO gain characteristic. Below is shown a
typical loop filter:
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 5503 | ****GESTRICHEN**** |
| 5522 | APPLICATION BOARD1 K4S |
| 5523 | APPLICATION BOARD2 K4S |
| 5524 | K4-LANGUAGE-FLASH |
| 5525 | APPLICATION BOARD3 K4S |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 5503FE 0081000 | 功能描述:多芯電纜 5 #22 PO FS FRPVC RoHS:否 制造商:Alpha Wire 導(dǎo)體數(shù)量:3 線規(guī) - 美國(guó)線規(guī)（AWG）:16 絞合:19 x 29 屏蔽:Shielded 長(zhǎng)度:100 ft 電壓額定值:600 V 外殼材料:Polytetrafluoroethylene (PTFE) 絕緣材料:Polytetrafluoroethylene (PTFE) 類型:Communication and Control |
| 5503-LHI | 制造商:Leviton Manufacturing Co 功能描述: |
| 5503-LHW | 制造商:Leviton Manufacturing Co 功能描述: |
| 5503-RC | 功能描述:固定電感器 27uH 10% RoHS:否 制造商:AVX 電感:10 uH 容差:20 % 最大直流電流:1 A 最大直流電阻:0.075 Ohms 工作溫度范圍:- 40 C to + 85 C 自諧振頻率:38 MHz Q 最小值:40 尺寸:4.45 mm W x 6.6 mm L x 2.92 mm H 屏蔽:Shielded 端接類型:SMD/SMT 封裝 / 箱體:6.6 mm x 4.45 mm |
| 5503UE 0081000 | 功能描述:多芯電纜 5 #22 PVC FRPVC RoHS:否 制造商:Alpha Wire 導(dǎo)體數(shù)量:3 線規(guī) - 美國(guó)線規(guī)（AWG）:16 絞合:19 x 29 屏蔽:Shielded 長(zhǎng)度:100 ft 電壓額定值:600 V 外殼材料:Polytetrafluoroethylene (PTFE) 絕緣材料:Polytetrafluoroethylene (PTFE) 類型:Communication and Control |
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