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參數(shù)資料
| 型號(hào)： | 54SX08-STD |
| 英文描述： | Controller Miscellaneous - Datasheet Reference |
| 中文描述： | 控制器雜項(xiàng)-數(shù)據(jù)表參考 |
| 文件頁(yè)數(shù)： | 4/5頁(yè) |
| 文件大?。?/td> | 92K |
| 代理商： | 54SX08-STD |
4
T i m i n g a n d U t iliza t io n
The SDRAM controller will function at over 100 Mhz when
synthesized into SX –3 silicon.
some tables for several parts. Other more-specific timing
information can be derived by using the DirecTime analysis
tools or by looking at the .adf file in the SDRAM controller
files.
Table 2
Part
Tsu
Treg-reg
Tco
Seq
count
Comb
count
54SX08A-3
6.3
6.9
5.7
90/256
34%
204/512
40%
54SX08-std
9.5
10.5
9.0
90
211
Table 3
Tsu
SX-3
ACTIVATE
5.2
WR_CYC
6.4
AD
2.8
CYC_DONE
6.3
WR_BE_NOW
4.8
RD_BE_NOW
5.9
CS0N
3.3
CS1N
4.0
RASN
2.8
CASN
2.8
WEN
3.0
MADDR
5.6
DQM
4.5
WR_BE_RDY
5.7
RD_BE_RDY
5.6
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