參數(shù)資料
型號: 54ACT112DMQB
元件分類: 鎖存器
英文描述: ACT SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP16
封裝: CERDIP-16
文件頁數(shù): 5/8頁
文件大?。?/td> 348K
代理商: 54ACT112DMQB
AC Electrical Characteristics for 'ACT Family Devices
Symbol
Parameter
V
CC
T
A = 55°C to +125°C
Units
Fig. No.
(V)
C
L = 50 pF
(Note 4)
Min
Max
f
max
Maximum Clock
5.0
80
MHz
Frequency
t
PLH
Propagation Delay
5.0
1.0
14.0
ns
CP
n to Qn or Qn
t
PHL
Propagation Delay
5.0
1.0
14.0
ns
CP
n to Qn or Qn
t
PLH
Propagation Delay
5.0
1.0
13.5
ns
C
Dn or SDn to Qn or Qn
t
PHL
Propagation Delay
5.0
1.0
13.5
ns
C
Dn or SDn to Qn or Qn
Note 4:
Voltage Range 5.0 is 5.0V ±0.5V
AC Operating Requirements:
Symbol
Parameter
V
CC
T
A = 55°C to +125°C
Units
Fig. No.
(V)
C
L = 50 pF
(Note 5)
Guaranteed Minimum
t
S
Setup Time, HIGH or LOW
5.0
8.0
ns
J
n or Kn to CPn
t
H
Hold Time, HIGH or LOW
5.0
1.5
ns
J
n or Kn to CPn
t
W
Pulse Width
5.0
ns
CP
n or CDn or SDn
t
rec
Recovery Time
5.0
3.0
ns
C
Dn or SDn to CPn
Note 5:
Voltage Range 5.0 is 5.0V ±0.5V
Capacitance
Symbol
Parameter
Max
Units
Conditions
C
IN
Input Capacitance
10.0
pF
V
CC = OPEN
C
PD
Power Dissipation Capacitance
60
pF
V
CC = 5.0V
5
www.national.com
100976 Version 2 Revision 2
Print Date/Time: 2009/07/20 16:20:36
54ACT112
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