參數(shù)資料
型號: 54298DM
英文描述: Dual/Triple Ultra-Low-Voltage SOT23 µP Supervisory Circuits
中文描述: 2,輸入數(shù)字復(fù)接器
文件頁數(shù): 3/4頁
文件大?。?/td> 90K
代理商: 54298DM
Switching Characteristics
V
CC
e a
5.0V, T
A
e a
25
§
C (See Section 1 for test waveforms and output load)
C
L
e
15 pF
R
L
e
400
X
Symbol
Parameter
Units
Min
Max
t
PLH
t
PHL
Propagation Delay, CP to Q
n
27
32
ns
Functional Description
This device is a high speed quad 2-port register. It selects
four bits of data from two sources (ports) under the control
of a Common Select input (S). The selected data is trans-
ferred to the 4-bit output register synchronous with the
HIGH-to-LOW transition of the Clock input (CP). The 4-bit
output register is fully edge-triggered. The Data inputs (I
nx
)
and Select input (S) need be stable only one setup time
prior to the HIGH-to-LOW transition of the clock for predict-
able operation.
Truth Table
Inputs
Output
S
I
0x
I
1x
Q
x
I
I
I
X
X
l
h
L
H
L
H
h
X
X
h
h
l
e
LOW Voltage Level one setup time prior to the HIGH-to-LOWclock
transition.
h
e
HIGH Voltage Level one setup time prior to the HIGH-to-LOW clock
transition.
H
e
HIGH Voltage level
L
e
LOW Voltage level
X
e
Immaterial
Logic Diagram
TL/F/10215–3
3
相關(guān)PDF資料
PDF描述
54298DMQB 2-Input Digital Multiplexer
54298FMQB Dual/Triple Ultra-Low-Voltage SOT23 µP Supervisory Circuits
5430000 GEHAEUSE POLYSTROL ZWEIFARB 120X65X40
5435000 GEHAEUSE POLYSTROL ZWEIFARB 120X65X65
5440000 Dual/Triple Ultra-Low-Voltage SOT23 µP Supervisory Circuits
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