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參數資料
| 型號： | 5367CA |
| 英文描述： | Dual/Triple Ultra-Low-Voltage SOT23 µP Supervisory Circuits |
| 中文描述： | 工業(yè)控制IC |
| 文件頁數： | 5/8頁 |
| 文件大?。?/td> | 152K |
| 代理商： | 5367CA |
5367
SMOKE DETECTOR
WITH
INTERCONNECT
AND
TIMER
www.allegromicro.com
5
TYPICAL APPLICATION
Sensitivity Adjust.
The detector sensitiv-
ity to smoke is set internally by a voltage
divider connected between V
DD
and V
SS
. The
sensitivity can be externally adjusted to the
individual characteristics of the ionization
chamber by connecting a resistor between pin
13 and V
DD
, or between pin 13 and V
SS
.
Low Battery.
The low battery threshold is
set internally by a voltage divider connected
between V
DD
and V
SS
. The threshold can be
increased by connecting a resistor between
pin 3 and V
DD
. The threshold can be de-
creased by connecting a resistor between pin
3 and V
SS
. The battery voltage level is
checked every 40 seconds during the 10 mA,
10 ms LED pulse. If an LED is not used, it
should be replaced with an equivalent resistor
(typically 500
to 1000
) such that the
battery loading remains at 10 mA.
Timer.
An internal timer is provided that
can be used in various configurations to allow
for a period of reduced smoke detector
sensitivity (“hush”). When a high-to-low
transition occurs at pin 1, the internal timer is
reset, the timer mode enabled, and the circuit
reset to a no alarm condition. The LED will
flash at a 10 second rate. If the level of
smoke is increased such that the reduced
sensitivity level is reached, the device will go
into the alarm condition. The timer, how-
ever, will continue to completion of the
nominal 10-1/4 minute period (368 clock
cycles). If the timer mode is not used, pin 1
should be tied low.
I/O.
A connection is provided at pin 2 to
allow multiple smoke detectors to be
commoned. If any single unit detects smoke
(I/O is driven high), all connected units will
sound their associated horns after a nominal 3
second delay. The LED is suppressed when
an alarm is signaled from an interconnected
NOTE 1: Use an external resistor to adjust sensitivity for a particular smoke
chamber.
NOTE 2: Select resistor to reduce sensitivity during timer mode.
NOTE 3: A resistor to ground or V
DD
may be added to this pin to modify low
battery voltage threshold.
TIMER
MODE
TO
OTHER
UNITS
NOTE
1
NOTE
3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
LOGIC
OSC. &
TIMING
HORN
DRIVER
V
DD
Dwg. EC-005A
V
SS
9 V
NOTE 2
200 k
5
2
200
8.2 M
1
μ
F
0.1
μ
F
1
2
PUSH
TO
TEST
0.001
μ
F
330
unit. An internal NMOS device acts as a charge dump to aid in appli-
cations involving a large (distributed) capacitance on pin 2. The
charge dump is activated only on the removal of a local alarm.
Testing.
On power up, all internal counters are reset. Internal test
circuitry allows for low battery check by holding pins 8 and 12 low
during power up, then reducing V
DD
and monitoring HORN
1
(pin 10).
All functional tests can be accelerated by driving pin 12 with a 2 kHz
square wave. The 10 ms strobe period must be maintained for proper
operation of the comparator circuitry.
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