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            • 您現(xiàn)在的位置:買賣IC網(wǎng) > PDF目錄116379 > 530QA107M000DGR (SILICON LABORATORIES) CRYSTAL OSCILLATOR, CLOCK, 107 MHz, CMOS/TTL OUTPUT PDF資料下載
            參數(shù)資料
            型號: 530QA107M000DGR
            廠商: SILICON LABORATORIES
            元件分類: XO, clock
            英文描述: CRYSTAL OSCILLATOR, CLOCK, 107 MHz, CMOS/TTL OUTPUT
            封裝: ROHS COMPLIANT, SMD, 6 PIN
            文件頁數(shù): 3/12頁
            文件大?。?/td> 215K
            代理商: 530QA107M000DGR
            第1頁第2頁當(dāng)前第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁
            Si530/531
            Rev. 1.1
            11
            DOCUMENT CHANGE LIST
            Revision 0.4 to Revision 0.5
            Updated Table 1, “Recommended Operating
            Conditions,” on page 2.
            Added maximum supply current specifications.
            Specified relationship between temperature at startup
            and operation temperature.
            Updated Table 4, “CLK± Output Phase Jitter,” on
            page 4 to include maximum rms jitter generation
            specifications and updated typical rms jitter
            specifications.
            Added Table 6, “CLK± Output Phase Noise
            (Typical),” on page 4.
            Added Output Enable active polarity as an option in
            Figure 1, “Part Number Convention,” on page 7.
            Revision 0.5 to Revision 1.0
            Updated Note 3 in Table 1, “Recommended
            Operating Conditions,” on page 2.
            Updated Figure 1, “Part Number Convention,” on
            page 7.
            Revision 1.0 to Revision 1.1
            Updated Table 1, “Recommended Operating
            Conditions,” on page 2.
            Device maintains stable operation over –40 to +85 C
            operating temperature range.
            Supply current specifications updated for revision D.
            Updated Table 2, “CLK± Output Frequency
            Characteristics,” on page 2.
            Added specification for ±20 ppm lifetime stability
            (±7 ppm temperature stability) XO.
            Updated Table 3, “CLK± Output Levels and
            Symmetry,” on page 3.
            Updated LVDS differential peak-peak swing
            specifications.
            Updated Table 4, “CLK± Output Phase Jitter,” on
            page 4.
            Updated Table 5, “CLK± Output Period Jitter,” on
            page 4.
            Revised period jitter specifications.
            Updated Table 7, “Absolute Maximum Ratings1,” on
            page 5 to reflect the soldering temperature time at
            260 C is 20–40 sec per JEDEC J-STD-020C.
            Updated 3. "Ordering Information" on page 7.
            Changed ordering instructions to revision D.
            Added 5. "Si530/Si531 Mark Specification" on page
            9.
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