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參數(shù)資料
| 型號： | 522938A |
| 英文描述： | Dual/Triple Ultra-Low-Voltage SOT23 µP Supervisory Circuits |
| 中文描述： | 集成電路 |
| 文件頁數(shù)： | 10/16頁 |
| 文件大?。?/td> | 141K |
| 代理商： | 522938A |
10
LTC 690/LTC 691
LTC 694/LTC 695
U
S
A
If battery connections are made through long wires, a 10
to 100
series resistor and a 0.1
μ
F capacitor are recom-
mended to prevent any overshoot beyond V
CC
due to the
lead inductance (Figure 4).
O
PPLICATI
W
U
I FOR ATIO
U
Figure 5. Timing Diagram for CE IN and CE OUT
OUT is an alternative signal to drive the CE, CS, or Write
input of battery-backed up CMOS RAM. CE OUT can also
be used to drive the Store or Write input of an EEPROM,
EAROM or NOVRAM to achieve similar protection. Figure
5 shows the timing diagram of CE IN and CE OUT.
CE IN can be derived from the microprocessor’s address
decoder output. Figure 6 shows a typical nonvolatile
CMOS RAM application.
Memory protection can also be achieved with the LTC690
and LTC694 by using RESET as shown in Figure 7.
4.3M
0.1
μ
F
V
BATT
LTC690
LTC691
LTC694
LTC695
GND
690 F04
10
Figure 4. 10
/0.1
μ
F Combination Eliminates Inductive
Overshoot and Prevents Spurious Resets During Battery
Replacement
Memory Protection
The LTC691 and LTC695 include memory protection
circuitry that ensures the integrity of the data in memory
by preventing write operations when V
CC
is at invalid level.
Two additional pins, CE IN and CE OUT, control the Chip
Enable or Write inputs of CMOS RAM. When V
CC
is 5V, CE
OUT follows CE IN with a typical propagation delay of
20ns. When V
CC
falls below the reset voltage threshold or
V
BATT
, CE OUT is forced high, independent of CE IN. CE
Table 1 shows the state of each pin during battery back-up.
When the battery switchover section is not used, connect
V
BATT
to GND and V
OUT
to V
CC
.
SIGNAL
V
CC
V
OUT
V
BATT
BATT ON
PFI
PFO
RESET
RESET
LOW LINE Logic low
WDI
WDO
CE IN
CE OUT
OSC IN
OSC SEL
STATUS
C2 monitors V
CC
for active switchover.
V
OUT
is connected to V
BATT
through an internal PMOS switch.
The supply current is 1
μ
A maximum.
Logic high. The open-circuit output voltage is equal to V
OUT
.
Power failure input is ignored.
Logic low
Logic low
Logic high. The open-circuit output voltage is equal to V
OUT
.
Watchdog input is ignored.
Logic high. The open-circuit output voltage is equal to V
OUT
.
Chip Enable Input is ignored.
Logic high. The open-circuit output voltage is equal to V
OUT
.
OSC IN is ignored.
OSC SEL is ignored.
Table 1. Input and Output Status in Battery Back-Up Mode
V
CC
V1
CE IN
V
OUT
= V
BATT
CE OUT
V
OUT
= V
BATT
V2
V1 = RESET VOLTAGE THRESHOLD
V2 = RESET VOLTAGE THRESHOLD +
RESET THRESHOLD HYSTERESIS
690 F05
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