參數(shù)資料
型號: 5222A01L
英文描述: DUAL LVCMOS / LVTTL-TO DIFFERENTIAL
中文描述: 雙的LVCMOS / LVTTL,差分
文件頁數(shù): 6/13頁
文件大小: 156K
代理商: 5222A01L
85222AM-01
www.icst.com/products/hiperclocks.html
REV. A NOVEMBER 15, 2005
6
Integrated
Circuit
Systems, Inc.
ICS85222-01
D
UAL
LVCMOS / LVTTL-
TO
-
D
IFFERENTIAL
HSTL T
RANSLATOR
A
PPLICATION
I
NFORMATION
Figure 1
shows how the differential input can be wired to accept
single ended levels. The reference voltage V_REF = V
/2 is
generated by the bias resistors R1, R2 and C1. This bias circuit
should be located as close as possible to the input pin. The ratio
F
IGURE
1. S
INGLE
E
NDED
S
IGNAL
D
RIVING
D
IFFERENTIAL
I
NPUT
W
IRING
THE
D
IFFERENTIAL
I
NPUT
TO
A
CCEPT
S
INGLE
E
NDED
L
EVELS
of R1 and R2 might need to be adjusted to position the V_REF in
the center of the input voltage swing. For example, if the input
clock swing is only 2.5V and V
CC
= 3.3V, V_REF should be 1.25V
and R2/R1 = 0.609.
V_REF
R1
1K
C1
0.1u
R2
1K
Single Ended Clock Input
CLKx
nCLKx
VDD
I
NPUTS
:
CLK I
NPUT
:
For applications not requiring the use of a clock input, it can
be left floating. Though not required, but for additional
protection, a 1k
Ω
resistor can be tied from the CLK input to
ground.
R
ECOMMENDATIONS
FOR
U
NUSED
I
NPUT
AND
O
UTPUT
P
INS
O
UTPUTS
:
HSTL O
UTPUT
All unused LVHSTL outputs can be left floating. We
recommend that there is no trace attached. Both sides of the
differential output pair should either be left floating or
terminated.
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