參數(shù)資料
型號: 514JBBXXXXXXBAGR
廠商: SILICON LABORATORIES
元件分類: XO, clock
英文描述: 170 MHz, OTHER CLOCK GENERATOR, PDSO6
封裝: 3.20 X 5 MM, ROHS COMPLIANT PACKAGE-6
文件頁數(shù): 21/32頁
文件大?。?/td> 267K
代理商: 514JBBXXXXXXBAGR
Si514
28
Preliminary Rev. 0.9
9. PCB Land Pattern: 5 x 7 mm, 6-pin
Figure 11 illustrates the 5 x 7 mm, 6-pin PCB land pattern for the Si514. Table 14 lists the values for the
dimensions shown in the illustration.
Figure 11. Si514 PCB Land Pattern
Table 14. PCB Land Pattern Dimensions (mm)
Dimension
(mm)
C1
4.20
E2.54
X1
1.55
Y1
1.95
Notes:
General
1.
All dimensions shown are in millimeters (mm) unless otherwise noted.
2.
Dimensioning and Tolerancing is per the ANSI Y14.5M-1994 specification.
3.
This Land Pattern Design is based on the IPC-7351 guidelines.
4.
All dimensions shown are at Maximum Material Condition (MMC). Least
Material Condition (LMC) is calculated based on a Fabrication Allowance of
0.05 mm.
Solder Mask Design
5.
All metal pads are to be non-solder mask defined (NSMD). Clearance
between the solder mask and the metal pad is to be 60 m minimum, all the
way around the pad.
Stencil Design
6.
A stainless steel, laser-cut and electro-polished stencil with trapezoidal walls
should be used to assure good solder paste release.
7.
The stencil thickness should be 0.125 mm (5 mils).
8.
The ratio of stencil aperture to land pad size should be 1:1.
Card Assembly
9.
A No-Clean, Type-3 solder paste is recommended.
10.
The recommended card reflow profile is per the JEDEC/IPC J-STD-020
specification for Small Body Components.
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