參數(shù)資料
型號： 4LVC652PWDH
廠商： NXP SEMICONDUCTORS
元件分類： 通用總線功能
英文描述： Octal transceiver/register with dual enable 3-State
中文描述： LVC/LCX/Z SERIES, 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO24
文件頁數(shù)： 9/14頁
文件大?。?/td> 147K
代理商： 4LVC652PWDH
Philips Semiconductors
Product specification
74LVC652
Octal transceiver/register with dual enable (3-State)
1998 Jul 29
9
AC WAVEFORMS (Continued)
V
M
= 1.5V at V
CC
V
M
= 0.5V * V
CC
at V
CC
V
OL
and V
OH
are the typical output voltage drop that occur with the
output load.
V
X
= V
OL
+ 0.3V at V
CC
2.7V
V
X
= V
OL
+ 0.1V
CC
at V
CC
<
2.7V
V
Y
= V
OH
– 0.3V at V
CC
2.7V
V
Y
= V
OH
– 0.1V
CC
at V
CC
<
2.7V
2.7V
2.7V
SV00774
VM
SAB, SBA
INPUT
Bn, An
OUTPUT
VM
tPLH
tPHL
GND
VI
VOL
VOH
Figure 3. Input S
AB
, S
BA
to output B
n
, A
n
propagation delay
times.
SV00775
outputs
disabled
outputs
enabled
outputs
enabled
tPHZ
tPZH
tPZL
tPLZ
VX
VOL
VCC
VCC
VI
GND
GND
GND
VY
VOH
VM
VM
VM
VM
OEBA INPUT
OEAB INPUT
OUTPUT
HIGH–to–OFF
OFF–to–HIGH
OUTPUT
LOW–to–OFF
OFF–to–LOW
Figure 4. OE inputs (OE
AB
, OE
BA
) to outputs A
n
, B
n
enable and
disable times.
TEST CIRCUIT
PULSE
GENERATOR
V
I
R
T
D.U.T.
V
O
C
L
50pF
S
1
2 x V
CC
Open
GND
500
500
V
CC
V
I
2.7V
V
CC
2.7V
2.7V – 3.6V
Test
S
1
GND
t
PLZ
/t
PZL
t
PHZ
/t
PZH
2 x V
CC
t
PLH
/t
PHL
Open
SY00003
V
CC
Figure 5. Load circuitry for switching times.
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