參數(shù)資料
型號(hào): 4093B
廠商: NXP Semiconductors N.V.
英文描述: Quadruple 2-input NAND Schmitt trigger
中文描述: 四2輸入與非施密特觸發(fā)器
文件頁數(shù): 4/6頁
文件大?。?/td> 79K
代理商: 4093B
January 1995
4
Philips Semiconductors
Product specification
Quadruple 2-input NAND Schmitt trigger
HEF4093B
gates
AC CHARACTERISTICS
V
SS
= 0 V; T
amb
= 25
°
C; C
L
= 50 pF; input transition times
20 ns
V
DD
V
SYMBOL
TYP.
MAX.
TYPICAL EXTRAPOLATION
FORMULA
63 ns
+
(0,55 ns/pF) C
L
29 ns
+
(0,23 ns/pF) C
L
22 ns
+
(0,16 ns/pF) C
L
58 ns
+
(0,55 ns/pF) C
L
29 ns
+
(0,23 ns/pF) C
L
22 ns
+
(0,16 ns/pF) C
L
10 ns
+
(1,0 ns/pF) C
L
9 ns
+
(0,42 ns/pF) C
L
6 ns
+
(0,28 ns/pF) C
L
10 ns
+
(1,0 ns/pF) C
L
9 ns
+
(0,42 ns/pF) C
L
6 ns
+
(0,28 ns/pF) C
L
Propagation delays
I
n
O
n
HIGH to LOW
5
90
40
30
85
40
30
60
30
20
60
30
20
185 ns
80 ns
60 ns
170 ns
80 ns
60 ns
120 ns
60 ns
40 ns
120 ns
60 ns
40 ns
10
15
t
PHL
5
LOW to HIGH
10
15
t
PLH
Output transition times
HIGH to LOW
5
10
15
t
THL
5
LOW to HIGH
10
15
t
TLH
V
DD
V
TYPICAL FORMULA FOR P (
μ
W)
Dynamic power
dissipation per
package (P)
5
1300 f
i
+ ∑
(f
o
C
L
)
×
V
DD2
6400 f
i
+ ∑
(f
o
C
L
)
×
V
DD2
18 700 f
i
+ ∑
(f
o
C
L
)
×
V
DD2
where
f
i
= input freq. (MHz)
f
o
= output freq. (MHz)
C
L
= load capacitance (pF)
(f
o
C
L
) = sum of outputs
V
DD
= supply voltage (V)
10
15
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