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參數(shù)資料
| 型號(hào)： | 4043B |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Quadruple R/S latch with 3-state outputs |
| 中文描述： | 四人間的R / S鎖存具有三態(tài)輸出 |
| 文件頁(yè)數(shù)： | 2/5頁(yè) |
| 文件大小： | 46K |
| 代理商： | 4043B |
January 1995
2
Philips Semiconductors
Product specification
Quadruple R/S latch with 3-state outputs
HEF4043B
MSI
DESCRIPTION
The HEF4043B is a quadruple R/S latch with 3-state
outputs with a common output enable input (EO). Each
latch has an active HIGH set input (S
0
to S
3
), an active
HIGH reset input (R
0
to R
3
) and an active HIGH 3-state
output (O
0
to O
3
).
When EO is HIGH, the state of the latch output (O
n
) can be
determined from the function table below. When EO is
LOW, the latch outputs are in the high impedance
OFF-state. EO does not affect the state of the latch.
The high impedance off-state feature allows common
busing of the outputs.
Fig.1 Functional diagram.
PINNING
FUNCTION TABLE
Notes
1.
H = HIGH state (the more positive voltage)
L = LOW state (the less positive voltage)
X = state immaterial
Z = high impedance state
FAMILY DATA, I
DD
LIMITS category MSI
See Family Specifications
HEF4043BP(N):
HEF4043BD(F):
HEF4043BT(D):
( ): Package Designator North America
16-lead DIL; plastic (SOT38-1)
16-lead DIL; ceramic (cerdip) (SOT74)
16-lead SO; plastic (SOT109-1)
EO
S
0
to S
3
R
0
to R
3
O
0
to O
3
common output enable input
set inputs (active HIGH)
reset inputs (active HIGH)
3-state buffered latch outputs
INPUTS
OUTPUT
O
n
EO
S
n
X
L
H
L
R
n
X
H
X
L
L
H
H
H
Z
L
H
latched
Fig.2 Pinning diagram.
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| 4043BE | 制造商:RCA 功能描述:LATCH RS 4-BIT WITH 3-STATE OUTPUTS |
| 4043K/3 | 制造商: 功能描述: 制造商:undefined 功能描述: |
| 4044 | 功能描述:測(cè)試插頭和測(cè)試插座 PHONE JACK/DBL BAN RoHS:否 制造商:Johnson / Emerson Connectivity Solutions 設(shè)備類型:Binding Posts 類型:Threaded stud 顏色:Black 電流額定值:15 A 觸點(diǎn)電鍍:Silver |
| 4044# | 制造商:Fluke Electronics 功能描述:PHONE JACK/DBL BANANA BULK |
| 4044-0002 | 制造商:SOLICO 功能描述: 制造商:Solitron Devices Inc 功能描述: |
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