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參數(shù)資料
| 型號(hào)： | 403GCX-3BC50C2 |
| 元件分類： | 復(fù)位半導(dǎo)體 |
| 英文描述： | 300mA LDO Linear Regulators with Internal Microprocessor Reset Circuit |
| 中文描述： | 32位微處理器 |
| 文件頁數(shù)： | 16/48頁 |
| 文件大小： | 768K |
| 代理商： | 403GCX-3BC50C2 |
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IBM PowerPC 403GC
16
WBE0/A4/
BE0
122 B13
O/I/O
Write Byte Enable 0 / Address Bus Bit 4 / Byte Enable 0. When the
403GC is bus master, the write byte enable outputs, WBE0:3, select
the active byte(s) in a memory write access to SRAM.
The byte enables can also be programmed as read/write byte
enables, depending on the mode set in the IOCR. Note 3 on page
33 summarizes the functional and timing differences in these signals
when programmed as read/write byte enables.
For 8-bit memory regions, WBE2 and WBE3 become address bits
30 and 31 and WBE0 is the byte-enable line. For 16-bit memory
regions, WBE2 and WBE3 become address bits 30 and 31 and
WBE0 and WBE1 are the high byte and low byte enables, respec-
tively. For 32-bit memory regions, WBE0:3 are byte enables for
bytes 0-3 on the data bus, respectively. When the 403GC is not bus
master, WBE0:1 are used as the A4:5 inputs (for bank register
selection) and WBE2:3 are used as the A30:31 inputs (for byte
selection and page crossing detection).
WBE1/A5/
BE1
123 A13
O/I/O
Write Byte Enable 1 / Address Bus Bit 5 / Byte Enable 1. See
description of WBE0 / A4 above.
WBE2/A30/
BE2
124 B12
O/I/O
Write Byte Enable 2 / Address Bus Bit 30 / Byte Enable 2. See
description of WBE0 / A4 above.
WBE3/A31/
BE3
125 A12
O/I/O
Write Byte Enable 3 / Address Bus Bit 31 / Byte Enable 3. See
description of WBE0 / A4 above.
XmitD
87
L12
O
Serial port transmit data.
Table 4. 403GC Signal Descriptions
Signal
Name
Pin
Ball
I/O
Type
Function
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 403GCX-3BC66C2 | 32-Bit Microprocessor |
| 403GCX-3BC80C2 | 300mA LDO Linear Regulators with Internal Microprocessor Reset Circuit |
| 403GCX-3BC80C2A | 300mA LDO Linear Regulators with Internal Microprocessor Reset Circuit |
| 403GCX-3JC50C2 | 32-Bit Microprocessor |
| 403GCX-3JC66C2 | 300mA LDO Linear Regulators with Internal Microprocessor Reset Circuit |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 403GCX-3BC66C2 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:32-Bit Microprocessor |
| 403GCX-3BC80C2 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:32-Bit Microprocessor |
| 403GCX-3BC80C2A | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:32-Bit Microprocessor |
| 403GCX-3JC50C2 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:32-Bit Microprocessor |
| 403GCX-3JC66C2 | 制造商:AppliedMicro 功能描述: |
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