參數(shù)資料
型號(hào): 4030B
廠商: NXP Semiconductors N.V.
英文描述: Quadruple exclusive-OR gate
中文描述: 四路異或門
文件頁(yè)數(shù): 3/3頁(yè)
文件大?。?/td> 28K
代理商: 4030B
January 1995
3
Philips Semiconductors
Product specification
Quadruple exclusive-OR gate
HEF4030B
gates
AC CHARACTERISTICS
V
SS
= 0 V; T
amb
= 25
°
C; C
L
= 50 pF; input transition times
20 ns
V
DD
V
SYMBOL
TYP.
MAX.
TYPICAL EXTRAPOLATION
FORMULA
Propagation delays
I
n
O
n
HIGH to LOW
5
85
35
30
75
30
25
60
30
20
60
30
20
175
75
55
150
65
50
120
60
40
120
60
40
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
57 ns
+
(0,55 ns/pF) C
L
24 ns
+
(0,23 ns/pF) C
L
22 ns
+
(0,16 ns/pF) C
L
47 ns
+
(0,55 ns/pF) C
L
19 ns
+
(0,23 ns/pF) C
L
17 ns
+
(0,16 ns/pF) C
L
10 ns
+
(1,0 ns/pF) C
L
9 ns
+
(0,42 ns/pF) C
L
6 ns
+
(0,28 ns/pF) C
L
10 ns
+
(1,0 ns/pF) C
L
9 ns
+
(0,42 ns/pF) C
L
6 ns
+
(0,28 ns/pF) C
L
10
15
5
10
15
t
PHL
LOW to HIGH
t
PLH
Output transition times
HIGH to LOW
5
10
15
5
10
15
t
THL
LOW to HIGH
t
TLH
V
DD
V
TYPICAL FORMULA FOR P (
μ
W)
Dynamic power
dissipation per
package (P)
5
1 100 f
i
+ ∑
(f
o
CL)
×
V
DD2
4 900 f
i
+ ∑
(f
o
CL)
×
V
DD2
14 400 f
i
+ ∑
(f
o
CL)
×
V
DD2
where
f
i
= input freq. (MHz)
f
o
= output freq. (MHz)
C
L
= load capacitance (pF)
(f
o
C
L
) = sum of outputs
V
DD
= supply voltage (V)
10
15
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