參數(shù)資料
型號(hào): 3D7523D-5
廠商: DATA DELAY DEVICES INC
元件分類: 網(wǎng)絡(luò)接口
英文描述: MONOLITHIC MANCHESTER ENCODER/DECODER
中文描述: DATACOM, MANCHESTER ENCODER/DECODER, PDSO14
封裝: 0.150 INCH, ROHS COMPLIANT, SOIC-14
文件頁數(shù): 2/5頁
文件大?。?/td> 164K
代理商: 3D7523D-5
3D7523
TABLE 1: PART NUMBER SPECIFICATIONS
PART
DECODER BAUD RATE (MBaud)
NUMBER
Nominal
3D7523-0.5
0.50
3D7523-1
1.00
3D7523-5
5.00
3D7523-10
10.00
3D7523-20
20.00
3D7523-25
25.00
3D7523-50
50.00
Any baud rate between 0.5 and 50 MBaud not shown is also available at no extra cost.
Minimum
Maximum
0.43
0.85
4.25
8.50
17.00
21.25
42.50
0.57
1.15
5.75
11.50
23.00
28.75
57.50
NOTE:
APPLICATION NOTES
ENCODER
The Manchester encoder subsystem samples the
data input at the rising edge of the input clock.
The sampled data is used in conjunction with the
clock rising and falling edges to generate the by-
phase level Manchester code.
The encoder employs the timing of the clock
rising and falling edges (duty cycle) to implement
the required coding scheme, as shown in Figure
1. To reduce the difference between the output
data high time and low time, it is essential that
the deviation of the input clock duty cycle from
50/50 be minimized.
The encoder presents at its outputs the true and
the complimented encoded data. The High-to-
Low time skew of the selected data output should
be budgeted by the user, as it relates to his
application, to satisfactorily estimate the
distortion of the transmitted data stream. Such an
estimate is very useful in determining the
functionality and margins of the data link, if a
Manchester decoder is used to decode the
received data.
RESET
(RESB)
CLOCK
(CIN)
DATA
(DIN)
TRANSMIT
(TX)
TRANSMIT
(TXB)
t
DS
t
DH
Figure 1: Timing Diagram (Encoder)
1/f
C
1
0
1
1
0
0
1
0
1
0
1
1
0
0
1
0
(Left high for normal operation)
T
2H
T
2L
T
1H
T
1L
Doc #06003
5/8/2006
DATA DELAY DEVICES, INC.
2
Tel: 973-773-2299 Fax: 973-773-9672 http://www.datadelay.com
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