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參數(shù)資料
| 型號(hào)： | 3D7523 |
| 廠商： | Data Delay Devices, Inc. |
| 英文描述： | MONOLITHIC MANCHESTER ENCODER/DECODER |
| 中文描述： | 整體式曼徹斯特編碼/解碼器 |
| 文件頁(yè)數(shù)： | 1/5頁(yè) |
| 文件大?。?/td> | 164K |
| 代理商： | 3D7523 |
3D7523
data
delay
devices, inc.
3
MONOLITHIC MANCHESTER
ENCODER/DECODER
(SERIES 3D7523)
FEATURES
PACKAGES
All-silicon, low-power CMOS technology
Encoder and decoder function independently
Encoder has buffered clock output
TTL/CMOS compatible inputs and outputs
Vapor phase, IR and wave solderable
Auto-insertable (DIP pkg.)
Low ground bounce noise
Maximum data rate: 50 MBaud
Data rate range:
±15%
Lock-in time: 1 bit
For mechanical dimensions, click
here.
For package marking details, click
here.
14
13
12
11
10
9
1
2
3
4
5
6
CI
CEN
COUT
DIN
RESB
VDD
CBUF
LOOP
TXENB
DOUTB
TXB
3D7523-xxx
DIP (.300)
3D7523G-xxx Gull Wing (.300)
3D7523D-xxx SOIC (.150)
N
RX
8
7
GND
TX
FUNCTIONAL DESCRIPTION
PIN DESCRIPTIONS
Encoder:
CIN
Clock Input
DIN
Data Input
RESB
Reset
CEN
Clock buffer enable
TXENB Transmit enable
CBUF
Buffered clock
TX,TXB Transmitted signal
Decoder:
RX
Received Signal
COUT
Recovered Clock
DOUTB Recovered Data
Common:
LOOP
Loop enable
VDD
+5 Volts
GND
Ground
The 3D7523 is a monolithic CMOS Manchester Encoder/Decoder combo
chip. The device uses bi-phase-level encoding to embed a clock signal
into a data stream for transmission across a communications link. In this
encoding mode, a logic one is represented by a high-to-low transition in
the center of the bit cell, while a logic zero is represented by a low-to-high
transition.
The Manchester encoder combines the clock (CIN) and data (DIN) into a
single bi-phase-level signal (TX). An inverted version of this signal (TXB) is
also available. The data baud rate (in MBaud) is equal to the input clock
frequency (in MHz). A replica of the clock input is also available (CBUF).
The encoder may be reset by setting the RESB input low; otherwise, it
should be left high. The TX and TXB signals may be disabled (high-Z) by
setting TXENB high. Similarly, CBUF may be disabled by setting CEN low.
Under most operating conditions, TX and TXB are always enabled, and
CBUF is not used. With this in mind, the 3D7523 provides internal pull-
down resistors on CEN and TXENB, so that most users can leave these
inputs uncommitted.
The Manchester decoder accepts the embedded-clock signal at the RX input. The recovered clock and
data signals are presented on COUT and DOUTB, respectively, with the data signal inverted. The
operating baud rate (in MBaud) is specified by the dash number of the device. The input baud rate may
vary by as much as
±15% from the nominal device baud rate without compromising the integrity of the
information received.
Because the decoder is not PLL-based, it does not require a long preamble in order to lock onto the
received signal. Rather, the device requires at most one bit cell before the data presented at the output is
valid. This is extremely useful in cases where the information arrives in bursts and the input is otherwise
turned off.
Normally, the encoder and decoder function independently. However, if the LOOP input is set high, the
encoded TX signal is fed back internally into the decoder and the RX input is ignored. This feature is
useful for diagnostics. The LOOP input has an internal pull-down resistor and may be left uncommitted if
this feature is not needed.
2006 Data Delay Devices
Doc #06003
DATA DELAY DEVICES, INC.
1
5/8/2006
3 Mt. Prospect Ave. Clifton, NJ 07013
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 3D7523-0.5 | 制造商:DATADELAY 制造商全稱:Data Delay Devices, Inc. 功能描述:MONOLITHIC MANCHESTER ENCODER/DECODER |
| 3D7523-1 | 制造商:DATADELAY 制造商全稱:Data Delay Devices, Inc. 功能描述:MONOLITHIC MANCHESTER ENCODER/DECODER |
| 3D7523-10 | 制造商:DATADELAY 制造商全稱:Data Delay Devices, Inc. 功能描述:MONOLITHIC MANCHESTER ENCODER/DECODER |
| 3D7523-20 | 制造商:DATADELAY 制造商全稱:Data Delay Devices, Inc. 功能描述:MONOLITHIC MANCHESTER ENCODER/DECODER |
| 3D7523-25 | 制造商:DATADELAY 制造商全稱:Data Delay Devices, Inc. 功能描述:MONOLITHIC MANCHESTER ENCODER/DECODER |
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