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參數(shù)資料
| 型號： | 3D7502-5 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | MONOLITHIC MANCHESTER DECODER |
| 中文描述： | 整裝曼徹斯特解碼器 |
| 文件頁數(shù)： | 1/4頁 |
| 文件大?。?/td> | 38K |
| 代理商： | 3D7502-5 |
3D7502
Doc #97032
5/19/97
DATA DELAY DEVICES, INC.
3 Mt. Prospect Ave. Clifton, NJ 07013
1
MONOLITHIC MANCHESTER
DECODER
(SERIES 3D7502)
FEATURES
All-silicon, low-power CMOS
technology
TTL/CMOS compatible inputs and
outputs
Vapor phase, IR and wave
solderable
Auto-insertable (DIP pkg.)
Low ground bounce noise
Maximum data rate:
50 MBaud
Data rate range:
±
15%
FUNCTIONAL DESCRIPTION
The 3D7502 product family consists of monolithic CMOS Manchester
Decoders. The unit accepts at the RX input a bi-phase-level,
embedded-clock signal. In this encoding mode, a logic one is
represented by a high-to-low transition within the bit cell, while a logic
zero is represented by a low-to-high transition. The recovered clock
and data signals are presented on CLK and DATB, respectively, with
the data signal inverted. The operating baud rate (in MBaud) is specified by the dash number. The input
baud rate may vary by as much as
±
15% from the nominal device baud rate without compromising the
integrity of the information received.
Because the 3D7502 is not PLL-based, it does not require a long preamble in order to lock onto the
received signal. Rather, the device requires at most one bit cell before the data presented at the output is
valid. This is extremely useful in cases where the information arrives in bursts and the input is otherwise
turned off.
The all-CMOS 3D7502 integrated circuit has been designed as a reliable, economic alternative to hybrid
TTL Manchester Decoders. It is TTL- and CMOS-compatible, capable of driving ten 74LS-type loads. It is
offered in standard 8-pin and 14-pin auto-insertable DIPs and space saving surface mount 8-pin and 14-
pin SOICs.
TABLE 1: PART NUMBER SPECIFICATIONS
PART
NUMBER
3D7502-5
3D7502-10
3D7502-20
3D7502-25
3D7502-30
3D7502-40
3D7502-50
BAUD RATE (MBaud)
Nominal
Minimum
5.00
10.00
20.00
25.00
30.00
40.00
50.00
Maximum
4.25
8.50
17.00
21.25
25.50
34.00
42.50
5.75
11.50
23.00
28.75
34.50
46.00
57.50
NOTES: Any baud rate between 5 and 50 MBaud not shown is also available at no extra cost.
1997 Data Delay Devices
data
delay
devices,
inc.
3
PACKAGES
8
7
6
5
1
2
3
4
RX
CLK
N/C
GND
VDD
N/C
N/C
DATB
3D7502M-xxx DIP (.300)
3D7502H-xxx
3D7502Z-xxx
Gull Wing (.300)
SOIC (.150)
14
13
12
11
10
9
8
1
2
3
4
5
6
7
RX
N/C
N/C
CLK
N/C
N/C
GND
VDD
N/C
N/C
N/C
N/C
N/C
DATB
3D7502-xxx
3D7502G-xxx Gull Wing (.300)
3D7502D-xxx
SOIC (.150)
DIP (.300)
PIN DESCRIPTIONS
RX
CLK
DATB
VCC
GND
Signal Input
Signal Output (Clock)
Signal Output (Data)
+5 Volts
Ground
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 3D7502SERIES | MONOLITHIC MANCHESTER DECODER |
| 3D7503D-20 | MONOLITHIC MANCHESTER ENCODER/DECODER |
| 3D7503 | MONOLITHIC MANCHESTER ENCODER/DECODER |
| 3D7503-10 | MONOLITHIC MANCHESTER ENCODER/DECODER |
| 3D7503-20 | MONOLITHIC MANCHESTER ENCODER/DECODER |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 3D7502-50 | 制造商:DATADELAY 制造商全稱:Data Delay Devices, Inc. 功能描述:MONOLITHIC MANCHESTER DECODER |
| 3D7502D10 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Logic IC |
| 3D7502D20 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Logic IC |
| 3D7502D25 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Logic IC |
| 3D7502D30 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Logic IC |
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