參數(shù)資料
型號： 3D7323G-1000
廠商： DATA DELAY DEVICES INC
元件分類： 通用總線功能
英文描述： MONOLITHIC TRIPLE FIXED DELAY LINE
中文描述： ACTIVE DELAY LINE, TRUE OUTPUT, PDSO14
封裝： ROHS COMPLIANT, GULL-WING, DIP-14
文件頁數(shù)： 1/4頁
文件大?。?/td> 139K
代理商： 3D7323G-1000
3D7323
MONOLITHIC TRIPLE
FIXED DELAY LINE
(SERIES 3D7323)
FEATURES
All-silicon, low-power CMOS technology
TTL/CMOS compatible inputs and outputs
Vapor phase, IR and wave solderable
Auto-insertable (DIP pkg.)
Low ground bounce noise
Leading- and trailing-edge accuracy
Delay range:
6 through 6000ns
Delay tolerance:
2% or 1.0ns
Temperature stability:
±
3% typ (-40C to 85C)
Vdd stability:
±
1% typical (4.75V to 5.25V)
Minimum input pulse width:
20% of total
delay
14-pin DIP available as drop-in replacement for
hybrid delay lines
FUNCTIONAL DESCRIPTION
The 3D7323 Triple Delay Line product family consists of fixed-delay
CMOS integrated circuits. Each package contains three matched,
independent delay lines. Delay values can range from 6ns through
6000ns. The input is reproduced at the output without inversion,
shifted in time as per the user-specified dash number. The 3D7323
is TTL- and CMOS-compatible, capable of driving ten 74LS-type
loads, and features both rising- and falling-edge accuracy.
The all-CMOS 3D7323 integrated circuit has been designed as a
reliable, economic alternative to hybrid TTL fixed delay lines. It is
offered in a standard 8-pin auto-insertable DIP and a space saving surface mount 8-pin SOIC.
TABLE 1: PART NUMBER SPECIFICATIONS
PACKAGES
8
7
6
5
1
2
3
4
I1
I2
I3
GND
VDD
O1
O2
O3
3D7323M DIP
3D7323H Gull-Wing
1
2
3
4
8
7
6
5
I1
I2
I3
GND
VDD
O1
O2
O3
3D7323Z SOIC
(150 Mil)
14
13
12
11
10
9
8
1
2
3
4
5
6
7
I1
N/C
I2
N/C
I3
N/C
GND
VDD
N/C
O1
N/C
O2
N/C
O3
3D7323
3D7323G Gull-Wing
3D7323K Unused pins
removed
DIP
For mechanical dimensions, click
here
.
For package marking details, click
here
.
PIN DESCRIPTIONS
I1
Delay Line 1 Input
I2
Delay Line 2 Input
I3
Delay Line 3 Input
O1
Delay Line 1 Output
O2
Delay Line 2 Output
O3
Delay Line 3 Output
VDD
+5 Volts
GND
Ground
N/C
No Connection
PART NUMBER
SOIC-8
3D7323Z
DELAY
PER LINE
(ns)
INPUT RESTRICTIONS
Absolute Max
Oper. Freq.
DIP-8
3D7323M
3D7323H
-6
-8
-10
-15
-20
-25
-30
-40
-50
-100
-200
-500
-1000
-6000
NOTE:
DIP-14
3D7323
3D7323G
-6
-8
-10
-15
-20
-25
-30
-40
-50
-100
-200
-500
-1000
-6000
DIP-14
3D7323K
-6
-8
-10
-15
-20
-25
-30
-40
-50
-100
-200
-500
-1000
-6000
Max Operating
Frequency
Min Operating
Pulse Width
Absolute Min
Oper. P.W.
-6
-8
-10
-15
-20
-25
-30
-40
-50
-100
-200
-500
-1000
-6000
6
±
1.0
8
±
1.0
10
±
1.0
15
±
1.0
20
±
1.0
25
±
1.0
30
±
1.0
40
±
1.0
50
±
1.0
100
±
2.0
200
±
4.0
500
±
10.0
1000
±
20
6000
±
120
55.5 MHz
41.6 MHz
33.3 MHz
22.2 MHz
16.7 MHz
13.3 MHz
11.1 MHz
8.33 MHz
6.67 MHz
3.33 MHz
1.67 MHz
0.67 MHz
0.33 MHz
0.05 MHz
125.0 MHz
111.0 MHz
100.0 MHz
100.0 MHz
100.0 MHz
83.3 MHz
71.4 MHz
62.5 MHz
50.0 MHz
25.0 MHz
12.5 MHz
5.00 MHz
2.50 MHz
0.42 MHz
9.0 ns
12.0 ns
15.0 ns
22.5 ns
30.0 ns
37.5 ns
45.0 ns
60.0 ns
75.0 ns
150.0 ns
300.0 ns
750.0 ns
1500.0 ns
9000.0 ns
4.0 ns
4.5 ns
5.0 ns
5.0 ns
5.0 ns
6.0 ns
7.0 ns
8.0 ns
10.0 ns
20.0 ns
40.0 ns
100.0 ns
200.0 ns
1200.0 ns
Any delay between 10 and 6000 ns not shown is also available.
2006 Data Delay Devices
Doc #06015
5/10/2006
DATA DELAY DEVICES, INC.
3 Mt. Prospect Ave. Clifton, NJ 07013
1
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
3D7323G-15 制造商:DATADELAY 制造商全稱:Data Delay Devices, Inc. 功能描述:MONOLITHIC TRIPLE FIXED DELAY LINE
3D7323G-20 制造商:DATADELAY 制造商全稱:Data Delay Devices, Inc. 功能描述:MONOLITHIC TRIPLE FIXED DELAY LINE
3D7323G-200 制造商:DATADELAY 制造商全稱:Data Delay Devices, Inc. 功能描述:MONOLITHIC TRIPLE FIXED DELAY LINE
3D7323G-25 制造商:DATADELAY 制造商全稱:Data Delay Devices, Inc. 功能描述:MONOLITHIC TRIPLE FIXED DELAY LINE
3D7323G-30 制造商:DATADELAY 制造商全稱:Data Delay Devices, Inc. 功能描述:MONOLITHIC TRIPLE FIXED DELAY LINE
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