參數(shù)資料
型號: 33LV408RPFS-30
廠商: MAXWELL TECHNOLOGIES
元件分類: SRAM
英文描述: 4 Megabit (512K x 8-Bit) CMOS SRAM
中文描述: 512K X 8 STANDARD SRAM, 30 ns, PDFP32
封裝: LDFP-32
文件頁數(shù): 7/12頁
文件大?。?/td> 224K
代理商: 33LV408RPFS-30
M
7
All data sheets are subject to change without notice
2004 Maxwell Technologies
All rights reserved.
4 Megabit (512K x 8-Bit) CMOS SRAM
33LV408
04.02.04 REV 2
F
IGURE
1: T
IMING
W
AVEFORM
OF
R
EAD
C
YCLE
(1)
F
IGURE
2: T
IMING
W
AVEFORM
OF
R
EAD
C
YCLE
(2)
Read Cycle Notes:
1.
WE is high for read cycle.
2.
All read cycle timng is referenced formthe last valid address to the first transition address.
3.
t
HZ
and t
OHZ
are defined as the time at which the outputs achieve the open circuit condition and are not referenced to V
OH
or
V
OL
levels.
4.
At any given temperature and voltage condition, t
HZ(max)
is less than t
LZ(mn)
both for a given device and fromdevice to device.
5.
Transition is measured + 200mV fromsteady state voltage with Load(B). This parameter is sampled and not 100% tested.
6.
Device is continuously selected with CS = V
IL.
7.
Address valid prior to coincident with CS transition low
8. For common I/O applications, mnimzation or elimnation of bus contention condition is necessary during read and write cycle.
Data Hold fromWrite Time
-20
-25
-30
t
DH
9, 10, 11
0
0
0
--
--
--
--
--
--
ns
T
ABLE
10. 33LV408 AC C
HARACTERISTICS
FOR
W
RITE
C
YCLE
(V
CC
= 3.3V + 10%, T
A
= -55
TO
+125
°
C,
UNLESS
OTHERWISE
SPECIFIED
)
P
ARAMETER
S
YMBOL
S
UBGROUPS
M
IN
T
YP
M
AX
U
NIT
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