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參數(shù)資料
| 型號(hào)： | 2SJ535-E |
| 元件分類： | JFETs |
| 英文描述： | 30 A, 60 V, 0.055 ohm, P-CHANNEL, Si, POWER, MOSFET, TO-220AB |
| 封裝： | SC-67, TO-220FM, 3 PIN |
| 文件頁(yè)數(shù)： | 7/8頁(yè) |
| 文件大?。?/td> | 102K |
| 代理商： | 2SJ535-E |
LV8800V
No.A0845-7/7
7. Charge Pump Circuit
The LV8800V n-channel DMOS output structure allows it to provide a charge pump based voltage step-up circuit. A
voltage 2 times the VCC voltage can be acquired by inserting capacitors (recommended value : 0.1
F or larger)
between the CP pin (pin 13) and CPC pin (pin 14). Note that this circuit is designed so that the stepped-up voltage
(VG) is clamped at about 9.5VDC. A larger capacitor must be used between the VG pin (pin 12) and ground if the
ripple on the stepped-up voltage (VG) results in VG exceeding 10V(VG max).
Observe the following points if the VG voltage is supplied from external circuits.
(1) The VG voltage supplied from the external circuits must not exceed the absolute maximum rating VG max.
(2) The capacitors between the CP pin (pin 13) and CPC pin (pin 14) are not required.
(3) Observe the correct sequence when turning the power supply on. Apply the VG voltage after first turning the
VCC voltage on, and cancel the VG voltage application before turning the VCC off.
(4) There is an IC-internal diode between the VCC and VG pins. Therefore, supply voltages such that VCC > VG
must never be applied to this IC.
8. Notes on PCB Pattern Design
The LV8800V is a system driver IC implemented using the Bi-CMOS process; the IC chip includes bipolar circuits,
MOS logic circuits, and MOS drive circuits. As a result, extreme care is required with respect to the pattern layout
when designing application circuits.
(1) Ground and VCC wiring layout
Insert a capacitor (recommended value : 1
F or larger) as near as possible to the pin between the power pin (pin 3)
and ground pin (pin 8).
(2) Positioning the external components
The external components that are connected to ground must be connected with lines that are as short as possible.
External components connected between IC pins must be placed as near to the pins as possible.
Application Circuit Example
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
VO
UO
VCC
1
F
0.1
F
0.5
1000pF
2200pF
COM
COMIN
FIL
OSC
SGND
WO
RF
CPC
CP
VG
PWM
FG
F/R
0.1
F
PWM
PWM Control Signal
f = 20k to 50kHz
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