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參數(shù)資料
| 型號： | 2SC5668-FB-A |
| 元件分類： | 小信號晶體管 |
| 英文描述： | L BAND, Si, NPN, RF SMALL SIGNAL TRANSISTOR |
| 封裝： | ULTRA SUPER MINIMOLD PACKAGE-3 |
| 文件頁數(shù)： | 4/18頁 |
| 文件大小： | 87K |
| 代理商： | 2SC5668-FB-A |
If
ΔV
IN is 1% of VIN for a 24V input to 3.3V output application
this equals 240 mV and f
SW = 400 kHz.
C
IN≥ 1A * 3.3V/24V * (1– 3.3V/24V) / (400000 * 0.240 V)
≥ 0.9μF
Additional bulk capacitance with higher ESR may be required
to damp any resonant effects of the input capacitance and
parasitic inductance of the incoming supply lines.
R
ON RESISTOR SELECTION
Many designs will begin with a desired switching frequency in
mind. For that purpose the following equation can be used.
f
SW(CCM) VO / (1.3 * 10
-10
* R
ON) (10)
This can be rearranged as
R
ON VO / (1.3 * 10
-10
* f
SW(CCM) (11)
The selection of RON and f
SW(CCM) must be confined by limi-
tations in the on-time and off-time for the COT control section.
The on-time of the LMZ14201 timer is determined by the re-
sistor R
ON and the input voltage VIN. It is calculated as follows:
t
ON = (1.3 * 10
-10
* R
ON) / VIN (12)
The inverse relationship of t
ON and VIN gives a nearly constant
switching frequency as V
IN is varied. RON should be selected
such that the on-time at maximum V
IN is greater than 150 ns.
The on-timer has a limiter to ensure a minimum of 150 ns for
t
ON. This limits the maximum operating frequency, which is
governed by the following equation:
f
SW(MAX) = VO / (VIN(MAX) * 150 nsec) (13)
This equation can be used to select R
ON if a certain operating
frequency is desired so long as the minimum on-time of 150
ns is observed. The limit for R
ON can be calculated as follows:
R
ON ≥ VIN(MAX) * 150 nsec / (1.3 * 10
-10
) (14)
If R
ON calculated in (11) is less than the minimum value de-
termined in (14) a lower frequency should be selected. Alter-
natively, V
IN(MAX) can also be limited in order to keep the
frequency unchanged.
Additionally note, the minimum off-time of 260 ns limits the
maximum duty ratio. Larger R
ON (lower FSW) should be se-
lected in any application requiring large duty ratio.
Discontinuous Conduction and Continuous Conduction
Modes
At light load the regulator will operate in discontinuous con-
duction mode (DCM). With load currents above the critical
conduction point, it will operate in continuous conduction
mode (CCM). When operating in DCM the switching cycle
begins at zero amps inductor current; increases up to a peak
value, and then recedes back to zero before the end of the
off-time. Note that during the period of time that inductor cur-
rent is zero, all load current is supplied by the output capacitor.
The next on-time period starts when the voltage on the at the
FB pin falls below the internal reference. The switching fre-
quency is lower in DCM and varies more with load current as
compared to CCM. Conversion efficiency in DCM is main-
tained since conduction and switching losses are reduced
with the smaller load and lower switching frequency. Operat-
ing frequency in DCM can be calculated as follows:
f
SW(DCM)VO*(VIN-1)*10μH*1.18*10
20
*I
O/(VIN–VO)*RON
2 (15)
In CCM, current flows through the inductor through the entire
switching cycle and never falls to zero during the off-time. The
switching frequency remains relatively constant with load cur-
rent and line voltage variations. The CCM operating frequen-
cy can be calculated using equation 7 above.
Following is a comparison pair of waveforms of the showing
both CCM (upper) and DCM operating modes.
CCM and DCM Operating Modes
V
IN = 12V, VO = 3.3V, IO = 1 A / 0.25 A
30114612
The approximate formula for determining the DCM/CCM
boundary is as follows:
I
DCBVO*(VIN–VO)/(2*10 μH*fSW(CCM)*VIN) (16)
Following is a typical waveform showing the boundary condi-
tion.
Transition Mode Operation
V
IN = 24V, VO = 3.3V, IO = 0.29 A
30114614
The inductor internal to the module is 10
μH. This value was
chosen as a good balance between low and high input voltage
applications. The main parameter affected by the inductor is
the amplitude of the inductor ripple current (I
LR). ILR can be
calculated with:
I
LR P-P=VO*(VIN- VO)/(10H*fSW*VIN) (17)
Where V
IN is the maximum input voltage and fSW is deter-
mined from equation 10.
If the output current I
O is determined by assuming that IO =
I
L, the higher and lower peak of ILR can be determined. Be
aware that the lower peak of I
LR must be positive if CCM op-
eration is required.
POWER DISSIPATION AND BOARD THERMAL
REQUIREMENTS
For the design case of V
IN = 24V, VO = 3.3V, IO = 1A, TAMB
(MAX) = 85°C , and TJUNCTION = 125°C, the device must see a
thermal resistance from case to ambient of less than:
θ
CA< (TJ-MAX — TAMB(MAX)) / PIC-LOSS - θJC (18)
www.national.com
12
LMZ14201
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