參數資料
型號: 2SC5455(NE67839)
廠商: NEC Corp.
英文描述: Low-Power, Single/Dual-Voltage µP Reset Circuits with Capacitor-Adjustable Reset Timeout Delay
中文描述: 離散
文件頁數: 1/12頁
文件大?。?/td> 79K
代理商: 2SC5455(NE67839)
1998
PRELIMINARY DATA SHEET
FEATURE
Ideal for medium-output applications
High gain, low noise
Small reverse transfer capacitance
Can operate at low voltage
ABSOLUTE MAXIMUM RATINGS (T
A
= 25
°
C)
PARAMETER
SYMBOL
RATING
UNIT
Collector to Base Voltage
V
CBO
9
V
Collector to Emitter Voltage
V
CEO
6
V
Emitter to Base Voltage
V
EBO
2
V
Collector Current
I
C
100
mA
Total Power Dissipation
P
T
200
mW
Junction Temperature
T
j
150
°
C
Storage Temperature
T
stg
–65 to +150
°
C
SILICON TRANSISTOR
2SC5455
NPN EPITAXIAL SILICON TRANSISTOR
4-PIN MINI MOLD
Document No. P13081EJ1V0DS00 (1st edition)
Date Published February 1998 N CP(K)
Printed in Japan
PACKAGE DIMENSIONS (in mm)
0
0
2
(
(
0
0
1
+
0
+
0
4
1
3
2
+
2.8
1.5
+0.2
–0.3
+0.2
0
+
0
+
0
+
PIN CONNECTIONS
1: Collector
2: Emitter
3: Base
4: Emitter
ELECTRICAL CHARACTERISTICS (T
A
= 25
°
C)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
Collector Cut-off Current
I
CBO
V
CB
= 5 V, I
E
= 0
0.1
μ
A
Emitter Cut-off Current
I
EBO
V
EB
= 1 V, I
C
= 0
0.1
μ
A
DC Current Gain
h
FE
V
CE
= 3 V, I
C
= 30 mA
Note 1
75
150
Gain Bandwidth Product
f
T
V
CE
= 3 V, I
C
= 30 mA, f = 2 GHz
12.0
GHz
Reverse Transfer Capacitance
C
re
V
CB
= 3 V, I
E
= 0, f = 1 MHz
Note 2
0.5
0.7
pF
Insertion Power Gain
|S
21e
|
2
V
CE
= 3 V, I
C
= 30 mA, f = 2 GHz
8.0
10.0
dB
Noise Figure
NF
V
CE
= 3 V, I
C
= 7 mA, f = 2 GHz
1.5
2.5
dB
Notes 1.
Pulse measurement P
W
350
μ
s, duty cycle
2 %
2.
Collector to base capacitance measured by capacitance meter (automatic balance bridge method) when
emitter pin is connected to the guard pin.
Because this product uses high-frequency process, avoid excessive input of static electricity, etc.
The information in this document is subject to change without notice.
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