參數(shù)資料
型號(hào): 29F400C-90
廠商: Macronix International Co., Ltd.
英文描述: 4M-BIT [512Kx8/256Kx16] CMOS SINGLE VOLTAGE 5V ONLY BOOT SECTOR FLASH MEMORY
中文描述: 4分位[512Kx8/256Kx16]電壓5V的CMOS單只引導(dǎo)扇區(qū)閃存
文件頁數(shù): 7/42頁
文件大?。?/td> 454K
代理商: 29F400C-90
7
P/N:PM1200
MX29F400C T/B
REV. 1.0, DEC. 20, 2005
Pins
CE#
OE#
WE#
A0
A1
A6
A9
Q0 ~ Q15
Mode
Read Silicon ID
Manufacture Code(1)
Read Silicon ID
Device Code(1)
Read
Standby
Output Disable
Write
Sector Protect without 12V
system (6)
Chip Unprotect without 12V
system (6)
Verify Sector Protect/Unprotect L
without 12V system (7)
Reset
L
L
H
L
L
X
V
ID
(2)
C2H (Byte mode)
00C2H (Word mode)
23H/ABH (Byte mode)
2223H/22ABH (Word mode)
D
OUT
HIGH Z
HIGH Z
D
IN
(3)
X
L
L
H
H
L
X
V
ID
(2)
L
H
L
L
L
L
X
H
H
H
H
X
H
L
L
A0
X
X
A0
X
A1
X
X
A1
X
A6
X
X
A6
L
A9
X
X
A9
H
L
H
L
X
X
H
H
X
L
H
X
H
X
H
Code(5)
X
X
X
X
X
X
X
HIGH Z
TABLE 2. MX29F400C T/B BUS OPERATION
NOTES:
1. Manufacturer and device codes may also be accessed via a command register write sequence. Refer to Table 1.
2. VID is the Silicon-ID-Read high voltage, 11.5V to 12.5V.
3. Refer to Table 1 for valid Data-In during a write operation.
4. X can be VIL or VIH.
5. Code=00H/XX00H means unprotected.
Code=01H/XX01H means protected.
A17~A12=Sector address for sector protect.
6. Refer to sector protect/unprotect algorithm and waveform.
Must issue "unlock for sector protect/unprotect" command before "sector protect/unprotect without 12V system"
command.
7. The "verify sector protect/unprotect without 12V system" is only following "Sector protect/unprotect without 12V
system" command.
Note that the Erase Suspend (B0H) and Erase Resume
(30H) commands are valid only while the Sector Erase
operation is in progress. Either of the two reset com-
mand sequences will reset the device(when applicable).
COMMAND DEFINITIONS
Device operations are selected by writing specific address
and data sequences into the command register. Writing
incorrect address and data values or writing them in the
improper sequence will reset the device to the read mode.
Table 1 defines the valid register command sequences.
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