參數(shù)資料
型號(hào): 2847
廠商: Linear Technology Corporation
英文描述: Software-Selectable Multiprotocol Transceiver with Termination and 3.3V Digital Interface
中文描述: 軟件選擇多協(xié)議收發(fā)器終止和3.3V數(shù)字接口
文件頁數(shù): 6/20頁
文件大?。?/td> 275K
代理商: 2847
6
LTC2847
sn2847 2847fs
PIU
NC (Pins 1,3,18,19,22,23):
No Connect.
V
DD
(Pin 2):
Generated Positive Supply Voltage for
V.28. Connect a 1
μ
F capacitor to ground.
V
CC
(Pin 4):
Input Supply Pin. Input supply to charge
pump and transceiver. 4.75V
V
CC
5.25V. Connect a
1
μ
F capacitor to GND.
D1 (Pin 5):
TTL Level Driver 1 Input.
D2 (Pin 6):
TTL Level Driver 2 Input.
D3 (Pin 7):
TTL Level Driver 3 Input.
R1 (Pin 8):
CMOS Level Receiver 1 Output with Pull-Up to
V
IN
when Three-Stated.
R2 (Pin 9):
CMOS Level Receiver 2 Output with Pull-Up to
V
IN
when Three-Stated.
R3 (Pin 10):
CMOS Level Receiver 3 Output with Pull-Up
to V
IN
when Three-Stated.
M0 (Pin 11):
TTL Level Mode Select Input 0 with Pull-Up
to V
IN
. See Table 1.
M1 (Pin 12):
TTL Level Mode Select Input 1 with Pull-Up
to V
IN
. See Table 1.
V
IN
(Pin 13):
Input Supply Pin. Input supply to digital
interface including receiver output drivers. 3V
V
IN
5.25V. Connect to V
CC
(Pin 4) or to separate supply for
lower receiver output swing. Connect a 1
μ
F capacitor to
GND.
M2 (Pin 14):
TTL Level Mode Select Input 2 with Pull-Up
to V
IN
. See Table 1.
DCE/DTE (Pin 15):
TTL Level Mode Select Input with
Pull-Up to V
IN
. See Table 1.
R3 B (Pin 16):
Receiver 3 Noninverting Input.
R3 A (Pin 17):
Receiver 3 Inverting Input.
R2 B (Pin 20):
Receiver 2 Noninverting Input.
R2 A (Pin 21):
Receiver 2 Inverting Input.
D3/R1 B (Pin 24):
Receiver 1 Noninverting Input and
Driver 3 Noninverting Output.
D3/R1 A (Pin 25):
Receiver 1 Inverting Input and Driver 3
Inverting Output.
D2 B (Pin 26):
Driver 2 Noninverting Output.
D2 A (Pin 27):
Driver 2 Inverting Output.
D1 B (Pin 28):
Driver 1 Noninverting Output.
D1 A (Pin 29):
Driver 1 Inverting Output.
GND (Pins 30,31):
Transceiver Ground.
V
EE
(Pins 32,33,36):
Generated Negative Supply Voltage.
Connect a 3.3
μ
F capacitor to GND. Exposed pad can also
be connected to V
EE
.
C2
(Pin 34):
Capacitor C2 Negative Terminal. Connect a
1
μ
F capacitor between C2
+
and C2
.
C2
+
(Pin 35):
Capacitor C2 Positive Terminal. Connect a
1
μ
F capacitor between C2
+
and C2
.
C1
(Pin 37):
Capacitor C1 Negative Terminal. Connect a
1
μ
F capacitor between C1
+
and C1
.
C1
+
(Pin 38):
Capacitor C1 Positive Terminal. Connect a
1
μ
F capacitor between C1
+
and C1
.
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