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參數(shù)資料
| 型號(hào)： | 27C8100-10 |
| 廠商： | Macronix International Co., Ltd. |
| 英文描述： | 8M-BIT [1M x8/512K x16] CMOS OTP ROM |
| 中文描述： | 800萬位[100萬x8/512K x16]檢察官辦公室的CMOS光盤 |
| 文件頁數(shù)： | 4/15頁 |
| 文件大小： | 536K |
| 代理商： | 27C8100-10 |
4
REV. 2.4, NOV. 19, 2002
P/N: PM0261
MX27C8100
MODE SELECT TABLE
BYTE/
MODE
CE
OE
A9
A0
Q15/A-1
VPP(5)
Q8-14
Q0-7
Read (Word)
VIL
VIL
X
X
Q15 Out
VCC
Q8-14 Out
Q0-7 Out
Read (Upper Byte)
VIL
VIL
X
X
VIH
GND
High Z
Q8-15 Out
Read (Lower Byte)
VIL
VIL
X
X
VIL
GND
High Z
Q0-7 Out
Output Disable
VIL
VIH
X
X
High Z
X
High Z
High Z
Standby
VIH
X
X
X
High Z
X
High Z
High Z
Program
VIL
VIH
X
X
Q15 In
VPP
Q8-14 In
Q0-7 In
Program Verify
VIH
VIL
X
X
Q15 Out
VPP
Q8-14 Out
Q0-7 Out
Program Inhibit
VIH
VIH
X
X
High Z
VPP
High Z
High Z
Manufacturer Code(3)
VIL
VIL
VH
VIL
0B
VCC
00H
C2H
Device Code(3)
VIL
VIL
VH
VIH
1B
VCC
38H
16H
NOTES:
1. VH = 12.0V
±
0.5V
2. X Either VIL or VIH.
3. A1 - A8, A10 - A18 = VIL (for auto select)
4. See DC Programming Characteristics for VPP voltages.
5. BYTE/VPP is intended for operation under DC Voltage conditions
only.
6. Manufacture code = 00C2H
Device code = B816H
It is recommended that CE be decoded and used as the
primary device-selecting function, while OE be made a
common connection to all devices in the array and
connected to the READ line from the system control bus.
This assures that all deselected memory devices are in
their low-power standby mode and that the output pins
are only active when data is desired from a particular
memory device.
SYSTEM CONSIDERATIONS
During the switch between active and standby
conditions, transient current peaks are produced on the
rising and falling edges of Chip Enable. The magnitude
of these transient current peaks is dependent on the
output capacitance loading of the device. At a minimum,
a 0.1 uF ceramic capacitor (high frequency, low inherent
inductance) should be used on each device between Vcc
and GND to minimize transient effects. In addition, to
overcome the voltage drop caused by the inductive
effects of the printed circuit board traces on One Time
Programmable Read Only Memory arrays, a 4.7 uF bulk
electrolytic capacitor should be used between VCC and
GND for each eight devices. The location of the
capacitor should be close to where the power supply is
connected to the array.
BYTE-WIDE MODE
With BYTE/VPP at GND
±
0.2V, outputs Q8-15 are tri-
stated. If Q15/A-1 = VIH, outputs Q0-7 present data bits
Q8-15. If Q15/A-1 = VIL, outputs Q0-7 present data bits
Q0-7.
STANDBY MODE
The MX27C8100 has a CMOS standby mode which
reduces the maximum VCC current to 100 uA. It is
placed in CMOS standby when CE is at VCC
±
0.3 V. The
MX27C8100 also has a TTL-standby mode which
reduces the maximum VCC current to 1.5 mA. It is
placed in TTL-standby when CE is at VIH. When in
standby mode, the outputs are in a high-impedance
state, independent of the OE input.
TWO-LINE OUTPUT CONTROL FUNCTION
To accommodate multiple memory connections, a two-
line control function is provided to allow for:
1. Low memory power dissipation,
2. Assurance that output bus contention will not
occur.
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相關(guān)代理商/技術(shù)參數(shù) |
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| 27C8100-12 | 制造商:MCNIX 制造商全稱:Macronix International 功能描述:8M-BIT [1M x8/512K x16] CMOS OTP ROM |
| 27C8100-15 | 制造商:MCNIX 制造商全稱:Macronix International 功能描述:8M-BIT [1M x8/512K x16] CMOS OTP ROM |
| 27C8100-20 | 制造商:MCNIX 制造商全稱:Macronix International 功能描述:8M-BIT [1M x8/512K x16] CMOS OTP ROM |
| 27CB4-17B/XA | 制造商:Microchip Technology Inc 功能描述: |
| 27CJ8/883 | 制造商: 功能描述: 制造商:undefined 功能描述: |
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