參數(shù)資料
型號: 25LC256-ISNG
廠商: Microchip Technology Inc.
英文描述: RES POWER .010 OHM 1W 1% SMT
中文描述: 256K SPI總線串行EEPROM
文件頁數(shù): 9/26頁
文件大?。?/td> 367K
代理商: 25LC256-ISNG
2003 Microchip Technology Inc.
Preliminary
DS21822C-page 9
25AA256/25LC256
2.4
Write Enable (
WREN
) and Write
Disable (
WRDI
)
The 25XX256 contains a write enable latch. See
Table 2-4 for the Write-Protect Functionality Matrix.
This latch must be set before any write operation will be
completed internally. The
WREN
instruction will set the
latch, and the
WRDI
will reset the latch.
The following is a list of conditions under which the
write enable latch will be reset:
Power-up
WRDI
instruction successfully executed
WRSR
instruction successfully executed
WRITE
instruction successfully executed
FIGURE 2-4:
WRITE ENABLE SEQUENCE (
WREN
)
FIGURE 2-5:
WRITE DISABLE SEQUENCE (
WRDI
)
SCK
0
2
3
4
5
6
7
1
SI
high-impedance
SO
CS
0
1
0
0
0
0
0
1
SCK
0
2
3
4
5
6
7
1
SI
high-impedance
SO
CS
0
1
0
0
0
0
0
1
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