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參數(shù)資料
| 型號(hào)： | 2509Z |
| 廠商： | Fairchild Semiconductor Corporation |
| 英文描述： | Monolithic Common Drain N-Channel 2.5V Specified PowerTrench MOSFET |
| 中文描述： | 單片共漏N溝道MOSFET的為2.5V指定的PowerTrench |
| 文件頁數(shù)： | 2/6頁 |
| 文件大?。?/td> | 198K |
| 代理商： | 2509Z |
FDM2509NZ Rev C2
Electrical Characteristics
T
A
= 25°C unless otherwise noted
Test Conditions
Symbol
Parameter
Min Typ Max Units
Off Characteristics
BV
DSS
Drain–Source Breakdown
Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate–Body Leakage,
V
GS
= 0 V,
I
D
= 250
μ
A
20
V
BV
DSS
T
J
I
DSS
I
GSS
I
D
= 250
μ
A, Referenced to 25
°
C
12
mV/
°
C
V
DS
= 16 V,
V
GS
=
±
12 V,
V
GS
= 0 V
V
DS
= 0 V
1
μ
A
μ
A
±
10
On Characteristics
V
GS(th)
V
GS(th)
T
J
R
DS(on)
(Note 2)
Gate Threshold Voltage
Gate Threshold Voltage
Temperature Coefficient
Static Drain–Source
On–Resistance
V
DS
= V
GS
,
I
D
= 250
μ
A, Referenced to 25C
V
GS
= 4.5 V,
I
D
= 8.7 A
V
GS
= 4.0 V,
I
D
= 8.5 A
V
GS
= 3.1 V,
D
= 8.1 A
V
GS
= 2.5 V,
I
D
= 7.6 A
V
GS
= 4.5 V, I
D
= 8.7 A, T
J
= 125
°
C
V
DS
= 5 V,
I
D
= 8.7 A
I
D
= 250
μ
A
0.6
0.9
–3
1.5
V
mV/
°
C
13
13.5
15.5
18
18.4
36
18
19
21
24
25
m
g
FS
Dynamic Characteristics
C
iss
Input Capacitance
C
oss
Output Capacitance
C
rss
Reverse Transfer Capacitance
R
G
Gate Resistance
Forward Transconductance
S
1200
320
185
2
pF
pF
pF
V
DS
= 10 V,
f = 1.0 MHz
V
GS
= 0 V,
V
GS
= 50mV,
f = 1.0 MHz
Switching Characteristics
(Note 2)
t
d(on)
Turn–On Delay Time
t
r
Turn–On Rise Time
t
d(off)
Turn–Off Delay Time
t
f
Turn–Off Fall Time
Q
g
Total Gate Charge
Q
gs
Gate–Source Charge
Q
gd
Gate–Drain Charge
11
15
27
12
12
2
4
20
27
43
22
17
ns
ns
ns
ns
nC
nC
nC
V
DD
= 10 V,
V
GS
= 4.5 V,
I
D
= 1 A,
R
GEN
= 6
V
DS
= 10 V,
V
GS
= 4.5 V
I
D
= 8.7 A,
Drain–Source Diode Characteristics and Maximum Ratings
I
S
Maximum Continuous Drain–Source Diode Forward Current
V
SD
Drain–Source Diode Forward
Voltage
t
rr
Diode Reverse Recovery Time
Q
rr
Diode Reverse Recovery Charge
1.8
1.2
A
V
V
GS
= 0 V,
I
S
= 1.8 A
(Note 2)
0.7
20
6.4
nS
nC
I
F
= 8.7 A,
dI
F
/dt = 100 A/μs
Notes:
1.
R
θ
JA
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. R
θ
JC
is guaranteed by design while R
θ
CA
is determined by the user's board design.
a)
55°C/W when
mounted on a 1in
2
pad
of 2 oz copper
Scale 1 : 1 on letter size
paper
b)
145°C/W when mounted on a
minimum pad of 2 oz copper
2.
Pulse Test: Pulse Width < 300
μ
s,
Duty Cycle < 2.0%
3.
The diode connected between the
gate and the source serves only
as protection against ESD. No
gate overvoltage rating is
implied.
F
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