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參數(shù)資料
| 型號(hào)： | 24LC65-IP |
| 廠商： | Microchip Technology Inc. |
| 英文描述： | 64K 2.5V I 2 C Smart Serial EEPROM |
| 中文描述： | 64K的2.5VI 2葷智能串行EEPROM |
| 文件頁(yè)數(shù)： | 3/12頁(yè) |
| 文件大?。?/td> | 106K |
| 代理商： | 24LC65-IP |
1996 Microchip Technology Inc.
DS21073E-page 3
24LC65
TABLE 1-3:
AC CHARACTERISTICS
FIGURE 1-2:
BUS TIMING DATA
Parameter
Symbol
Vcc = 2.5V-6.0V
STD. MODE
V
CC
FAST MODE
= 4.5-6.0V
Units
Remarks
Min
—
4000
4700
—
—
4000
Max
100
—
—
1000
300
—
Min
—
600
1300
—
—
600
Max
400
—
—
300
300
—
Clock frequency
Clock high time
Clock low time
SDA and SCL rise time
SDA and SCL fall time
START condition setup time
F
T
T
CLK
kHz
ns
ns
ns
ns
ns
HIGH
LOW
T
R
T
F
:
STA
(Note 1)
(Note 1)
After this period the first
clock pulse is generated
Only relevant for
repeated START condi-
tion
T
HD
START condition setup time
T
SU
:
STA
4700
—
600
—
ns
Data input hold time
Data input setup time
STOP condition setup time
Output valid from clock
Bus free time
T
T
T
HD
:
:
:
DAT
0
—
—
—
0
—
—
—
900
—
ns
ns
ns
ns
ns
SU
DAT
250
4000
—
4700
100
600
—
1300
SU
T
T
STO
AA
3500
—
(Note 2)
Time the bus must be
free before a new trans-
mission can start
(Note 1), C
B
BUF
Output fall time from V
V
IL
max
Input filter spike suppression
(SDA and SCL pins)
Write cycle time
Endurance
High Endurance Block
Rest of Array
Note 1: Not 100 percent tested. C
2: As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region
(minimum 300 ns) of the falling edge of SCL to avoid unintended generation of START or STOP conditions.
3: The combined T
SP
and V
HYS
specifications are due to new Schmitt trigger inputs which provide improved
noise and spike suppression. This eliminates the need for a Ti specification for standard operation.
4: The times shown are for a single page of 8 bytes. Multiply by the number of pages loaded into the write
cache for total time.
5: This parameter is not tested but guaranteed by characterization. For endurance estimates in a specific appli-
cation, please consult the Total Endurance Model which can be obtained on our BBS or website.
IH
min to
T
OF
—
250
20 + 0.1
C
—
B
250
ns
≤
100 pF
T
SP
—
50
50
ns
Note 3
T
WR
—
5
—
5
ms/page (Note 4)
10M
1M
—
—
10M
1M
—
—
cycles
25
Mode (Note 5)
°
C, Vcc = 5.0V, Block
B
= total capacitance of one bus line in pF.
SCL
SDA
IN
SDA
OUT
T
SU
:
STA
T
SP
T
AA
T
F
T
LOW
T
HIGH
T
HD
:
STA
T
HD
:
DAT
T
SU
:
DAT
T
SU
:
STO
T
BUF
T
AA
T
R
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相關(guān)代理商/技術(shù)參數(shù) |
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| 24LC65T/SM | 功能描述:電可擦除可編程只讀存儲(chǔ)器 8kx8 - 2.5V Smart RoHS:否 制造商:Atmel 存儲(chǔ)容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時(shí)鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 |
| 24LC65T/SMG | 功能描述:電可擦除可編程只讀存儲(chǔ)器 8kx8 - 2.5V Smart Lead Free Package RoHS:否 制造商:Atmel 存儲(chǔ)容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時(shí)鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 |
| 24LC65T-I/SM | 功能描述:電可擦除可編程只讀存儲(chǔ)器 8kx8 - 2.5V Smart RoHS:否 制造商:Atmel 存儲(chǔ)容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時(shí)鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 |
| 24LC65T-I/SMG | 功能描述:電可擦除可編程只讀存儲(chǔ)器 8kx8 - 2.5V Smart Industrial Temp RoHS:否 制造商:Atmel 存儲(chǔ)容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時(shí)鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 |
| 24LCS21A/P | 功能描述:電可擦除可編程只讀存儲(chǔ)器 2.5V Dual Mode RoHS:否 制造商:Atmel 存儲(chǔ)容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時(shí)鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 |
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