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參數(shù)資料
| 型號： | 24LC52-ST |
| 廠商： | Microchip Technology Inc. |
| 元件分類： | EEPROM |
| 英文描述： | 2K 2.5V I 2 C Serial EEPROM with Software Write Protect |
| 中文描述： | 2K 2.5VI 2 C串行EEPROM，帶有軟件寫保護(hù) |
| 文件頁數(shù)： | 8/12頁 |
| 文件大小： | 81K |
| 代理商： | 24LC52-ST |
24LCS52
DS21166B-page 8
Preliminary
1996 Microchip Technology Inc.
7.4
Contiguous Addressing Across
Multiple Devices
The chip select bits A2, A1, A0 can be used to expand
the contiguous address space for up to 16K bits by add-
ing up to eight 24LCS52 devices on the same bus. In
this case, software can use A0 of the control byte as
address bit A8, A1 as address bit A9, and A2 as
address bit A10. It is not possible to sequentially read
across device boundaries.
8.0
PIN DESCRIPTIONS
8.1
SDA Serial Address/Data Input/Output
This is a bi-directional pin used to transfer addresses
and data into and data out of the device. It is an open
drain terminal, therefore the SDA bus requires a pull-up
resistor to V
CC
(typical 10k
for 100 kHz, 1k
for 400
kHz).
For normal data transfer SDA is allowed to change only
during SCL low. Changes during SCL high are reserved
for indicating the START and STOP conditions.
8.2
SCL Serial Clock
This input is used to synchronize the data transfer from
and to the device.
8.3
A0, A1, A2
The levels on these inputs are compared with the cor-
responding bits in the slave address. The chip is
selected if the compare is true.
Up to eight 24LCS52 devices may be connected to the
same bus by using different chip select bit combina-
tions. These inputs must be connected to either Vcc or
Vss.
8.4
WP
This is the hardware write protect pin. It can be tied to
V
CC
, V
SS
, or left floating. If tied to Vcc, the hardware
write protection is enabled. If the WP pin is tied to Vss
the hardware write protection is disabled. If the WP pin
is left floating, an internal pull down resistor will pull the
WP pin to Vss and the hardware write protection will be
disabled.
8.5
Noise Protection
The 24LCS52 employs a V
CC
threshold detector circuit
which disables the internal erase/write logic if the V
CC
is below 1.5 volts at nominal conditions.
The SCL and SDA inputs have Schmitt trigger and filter
circuits which suppress noise spikes to assure proper
device operation even on a noisy bus.
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參數(shù)描述 |
|---|---|
| 24LC64-/SN | 制造商:Microchip Technology Inc 功能描述: |
| 24LC64-E/MNY | 功能描述:電可擦除可編程只讀存儲器 64K 8K X 8 2.5V SER EE EXT RoHS:否 制造商:Atmel 存儲容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 |
| 24LC64-E/MS | 功能描述:電可擦除可編程只讀存儲器 8kx8 - 2.5V RoHS:否 制造商:Atmel 存儲容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 |
| 24LC64-E/P | 功能描述:電可擦除可編程只讀存儲器 8kx8 - 2.5V RoHS:否 制造商:Atmel 存儲容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 |
| 24LC64-E/SM | 功能描述:電可擦除可編程只讀存儲器 8kx8 - 2.5V RoHS:否 制造商:Atmel 存儲容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 |
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